Design a CMOS inverter using Cadence Virtuoso

[@rohansingh4359]

Dude where did you disappear? :/ The best explanation ever! We need the second part!

[@briancrist9285]

Thank you for this video! A rare combination of theory explanation, design insight and Virtuoso instruction in one video.

[@gate-way8072]

Thank you for this wonderful video and explanation is clear. It helped me alot

[@yoganandaynr1672]

Very Nice explanation and demonstration Sir.
Thank you

[@basmagamal4211]

thank you for this great demonstration but may I ask you why we didn't take the frequency and the probability of transition from zero to one in the account while we calculate the total power ?? and If we take them what will be the change thank you in advance

[@tradingup10x]

Best video so far... thanks

[@joseluisbecerril3829]

Jonathan Okocha

[@samu50z]

Can we do tapeout with gpdk 90nm designed in cadence

[@saisatish1743]

How to add analogLib again....if it was removed by-mistake?

[@AdheikDominicBEC]

lol

[@muiduddinchowdhury]

How can I add the tsmcN65 technology library ti cadence virtuoso? Help me, please.

[@pavankumarkori715]

i have a doubt if in cadence how i increase my sterngth of inverter

[@subashsk13]

Bro,i need to add 65nm technology,please tell how to add in my libreary

[@SandeepGupta-re2cn]

Sir how to Install cadence software. There is no direct source to download this software. Please help me

[@Gb-se7ei]

Sir told me zener diode edit properties in analoglib

[@VigneshD25]

The best

[@babylonaliking]

عزيزي اذا انت مصري ممكن عربي عمل هذا الفيديو

[@therandomchannel9226]

you called 4 as 5.. 450 475 hehe