MACRO PLACEMENT | FLOORPLAN | CADENCE | INNOVUS | PHYSICAL DESIGN | ASIC | ELECTRONICS | VLSIFaB

[@asicdesignbasics2156]

Good work man, I am tapeout more than 20 blocks in the ownership mode ,but you share knowledge with free of cost to everyone hats off

[@VLSIFaB]

When there is a will ...there is a way😊😊

[@VLSIFaB]

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[@919470583947]

Very helpful tutorial. Thank you very much. please keep posting more videos like this.

[@VLSIFaB]

PURNENDU MISHRA welcome dear.

[@patinagreene9070]

Well done video! Thank you for running through this step by step and also explaining some nuances such as difference between halo and blockage, etc. Thank You.

[@VLSIFaB]

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[@aasthasingh1887]

Very helpful sir

[@iclabs]

Nice tutorial, good job sir.

[@VLSIFaB]

thanks

[@VLSIFaB]

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[@StayInBliss]

nd sir you are fabulous, grt lerningm

[@VLSIFaB]

thnks buddy, kindly share it if you find it helpful.

[@VLSIFaB]

thnks buddy, kindly share it if you find it helpful.

[@karthickramki4062]

what is diff b/w cell padding and halo

[@dipankarsaha702]

Sir...plz do a video lecture on CTS specially skew grouping,skew balancing,how clock tree is built etc....

[@VLSIFaB]

basic cts video uploaded...check it...skew grouping will give shortly..

[@VLSIFaB]

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[@sridharchandrasekar7787]

Io of macros to be declared as inout?

[@krishna420hrushi]

Thank u sir

[@VLSIFaB]

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[@prakashbadhavath4234]

Please do video on sta analysis and congestion removal techniques

[@VLSIFaB]

sta analysis videos are already there, will try to make a video on congestion removal .

[@VLSIFaB]

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[@saijagadeesh1708]

How IR drop and congestion issue will come if we place macros at the centre of the core , any body explain please ?

[@VLSIFaB]

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[@StayInBliss]

sir how do we get cdl netlist for lvs check?

[@VLSIFaB]

it will be provided by foundry, i.e tsmc,umc,scl etc

[@sanjusingertelugu9862]

hi sir how to give channel spacing between macros? how to decide that space?

[@VLSIFaB]

kindly mention your doubts in community section...we are starting 5 minute series..wd will discuss the doubts there.

[@lalithagogineni2219]

Hii sir very helpful video sir thank you for explanation. If it is possible can you explain macro placement using icc2 tool thanks in advance sir

[@VLSIFaB]

Sure

[@VLSIFaB]

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[@sanjusingertelugu9862]

if std cell is overlap with macro how to resolve the problem?

[@VLSIFaB]

In macro boundry we put blockages so std cell won't get place near to macro.

[@sridharchandrasekar7787]

Sir i need help

[@balagopi3361]

When we create guid, region and fence make video

[@VLSIFaB]

okay will do that

[@VLSIFaB]

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[@VLSIFaB]

Sure

[@CHANDRA_SEKHAR_S]

Any online labs available

[@VLSIFaB]

planning to start online courses ..check in udemy or nptel may be you get some more idea.

[@CHANDRA_SEKHAR_S]

@@VLSIFaB ok

[@VLSIFaB]

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[@Easylife_120]

Is there any vedio on IO ring ring creation ?

[@VLSIFaB]

ASquare Buddy wl be uploading..keep on suggesting

[@VLSIFaB]

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