Types of prediction w.r.p.t SV-UVM RAL

[@starlightsr]

Thank you Munsif! For the first time, the 3 types of prediction are clear to me!

[@gokulp6878]

An excellent explanation.Could you please give examples of the desired value and mirrored value.

[@MunsifMAhmad]

Soon will upload a complete video:)

[@rockingstone7700]

What is the meaning of defining register sequence or defining bus sequence

[@MunsifMAhmad]

Bus sequences r normal sequences, as we r defining our own sequence extends from uvm_sequence, where as a register sequence u can find like uvm_reg_hw_reset_seq, uvm_reg_single_bit_bash_seq and so on i.e register build in sequences..

[@nayyerirbaz9408]

Good initiative.. 👍

[@carterlee287]

What does "Work with register sequence only" mean? Can't I use Properties of uvm_reg_field? update() get() etcs ?

[@subbireddymanne1887]

May I know Value and Desired value is same?

[@faizangokak3355]

Please, share the UVM Cookbook link 🔗.

[@MunsifMAhmad]

Hi,
Its available on verification academy..

[@MunsifMAhmad]

Share ur mail id will forward over there..

[@faizangokak3355]

@@MunsifMAhmad Thank you bhai

[@faizangokak3355]

@@MunsifMAhmad Let me know, once you shared. Thanks

[@MunsifMAhmad]

Where is mail id?