Transmission Gates| Implementation of LOGIC GATES using (Transmission Gates )

[@mayanksinha7612]

Brilliantly explained. Thanks a lot tomorrow is my lab exam on cadence this will surely help me a lot in designing circuits of logic gates using transmission gate ❤❤

[@lightningllama]

So straightforward and well-explained. Thanks a bunch!

[@vaibhavk3177]

At 2:49 great voice....loved it!!

[@abhishekrajwanshi5265]

bsdk padh le

[@ajazhussain2919]

Padh le bhyyy

[@theupandup5856]

😁😁

[@rathnarajugudala3389]

2:53 A random girl🥱🥱

[@amirphilip2234]

100% attention 😂😂

[@young_sparrow]

Very nice and correct explanation.. there are many wrong videos on UA-cam wherein they claim to implement AND gate with only one transmission gate.. may god bless you!

[@krishnakittu6637]

Thanks ....It simply understandable...It helped me

[@adityamahilane5709]

Badhiya samjhaya hawa ji👍

[@ateebshivalli3618]

Thank you for your wonderful explanation ❤❤❤❤❤

[@dr.saadsyoutubechannel3723]

For AND gate, you don't need two TGs. The bottom TG can be replaced by an NMOS only because it is always transmitting Logic 0.

[@vamosabv]

Wouldn't that lead to a high impedance state and not 0? I thought we were using the second TG so that we are sure the ground is being pulled to 0.

[@kuroyasha9009]

That will make it the same as cmos logic

[@maddalarachana9350]

Thanks for the nice explanation.

[@howyourcollegelooks6416]

awesome bro/ thanks well taught completely understand the topic,,,,,arigato gosaimas

[@gumbyybumg]

Great explanation! Thank you very much

[@invi-tronics530]

liked the way of explaining... everything in detail

[@pranjalpimpale8465]

legendary video...tysm

[@getlost89]

hello sir
tomorrow is my semester exam...this concept was very tough for me as my faculty didnt teach properly...wish i cud have found your videos sooner...

[@sarangupta4792]

Simply superb ❤❤

[@sagniksarkar33]

very well explained.

[@garnikpepelyan8760]

Thank you. Very good explanation

[@shraddhalone8151]

Thanks Great Explanation!!

[@camilotello3296]

I loved your video! :)

[@nehasrinivas7501]

Really super explanation sir please do more vedios on this dica please sir 🙏

[@Nikhee8]

Thanks man very simple and neat writing ☺️ cool
Can U upload video on pseudo n mos inverter with neat sketches by this week??

[@foroughyaftan2568]

It was so useful

[@gurkengerd9981]

Why do we need to use a second TG for the AND Gate? Y will only be 1 if A and B are 1, otherwise its 0, thats exactly what an AND gate does. So why the second one?

[@TechBlooms]

In the video B is a control signal and the first TG allow only two possible combinations ie(01,11) in which B is 1 and for B = 0 the First TG is open circuited and ull not get all 4 combinations using one TG

[@gurkengerd9981]

@@TechBlooms But why does it matter if we actually do something with the other combinations? The output on the right will be 0 no matter what.

[@TechBlooms]

@@gurkengerd9981 using two TG you will get all combination of an and gate which is not possible using only one

[@NOOR-dy6yn]

Thanks Sir 🙏

[@Super_Smash_Dude]

What is a control signal?
Great video!

[@srivageeswarigayathrivenka4870]

Clock

[@emu9991]

LOVE U MAN

[@Don_ron666]

VERY GOOD

[@mangapathiraju7198]

If only Pmos or only nmos is on, can we say inputs transfers to output?

[@melouamaachoulycee]

hello sir
thank you for your explanation .
if possible sir to send me the MATLAB code that allows me to trace the VTC AND with transmission grid.thanks sir.

[@santhipriya9675]

Thank you sir

[@preethikasaran6536]

At 2:10 when c=0 isn't pmos in on state and a=b

[@TechBlooms]

No PMO's is off as input to it is cbar
Thankyou for our question
Share, subscribe , Like ----Tech Blooms

[@preethikasaran6536]

@@TechBlooms thanks a lot
Got it 👍

[@tsheringwangchuk3371]

i think this video help me

[@anbukarasi1389]

Thanks 👍🏻

Thanks sir

[@Adithyashetty1310]

2:52

[@kumarapuanjali1080]

Thank you

[@devgupta9487]

Thankyou bhai

[@kashifabbasiabbasi5388]

High transmission methane in pipeline network, or high electrical power of huge flow of electrons measured, costed, distributed to the end users in the form low pressure or step downed voltage using these electrical and electronic devices like transducers, transmitters in the circuitary ,,is it not,, from where I get professional certification in these industries,,, please guide

[@md.mahrufalam4927]

Thanks!

[@RekhaChavan-gp6np]

Nmos passes 0 and pmos passes 1 effectively correct it

[@opshot1144]

wtf its correct once u check

[@imsatyamtiwari8]

It’s absolutely not correct
Pmos will pass ‘1’ & Nmos will pass ‘0’

[@ԴավիթԲաբայան-յ4ւ]

Wrong logic for And gate. Third option when A must be 1 in case when B is a control signal. See for third line when B is 0, first TG is off, and second is on , and as left side is grounded it's always 0. But we wanted in case when B=0 do A=1.

[@ԴավիթԲաբայան-յ4ւ]

Same for the others lol

[@jeffzee3791]

2:52 What voice I heard? 😂😅

[@sahalhossainsiam5440]

For p mos to on don’t we need B= 1 & B bar = 0 ?!

[@margaritalilly6807]

Thank you 🤗

[@hasanmahmud8010]

Where is XOR??

[@muditjain1387]

What about NOT gate?

[@deepakkrishnan7979]

thanq for the video

[@mdjibrelmansuri4382]

2:53 🥱

[@kamrulhassan1161]

Should we join B and B bar

[@TechBlooms]

No you should not join B and Bar

[@tukaramgoud1650]

Not perfectly explained...

[@user-hp1pw4ip8s]

awesome

[@informationtech4170]

2:53

[@vaijayantikolhar8735]

Thank you