You missed about the MOS body diode and how to prevent it by tying the body of NMOS to GND and PMOS to VDD. Also it is important to note that the transmission gate cannot be built using typical off-the-shelf PMOS and NMOS because their bodies are always tied to the Source. One exception is CD4007, which can still be bought (although very rare nowadays) to build one. I know you have other video addressing related topic (body effect), but I thought it is important to mention it here to not misled the audiences into thinking that they can easily build one using typical MOSFETs.
3:20 !! nmos is not good at passing zero ? ? is it true ? aslo you said @ 5:26 nmos isn't good for passing Vdd ,! which one is true ? first educate yourself then earn money in patreon
He is correct in his labeling for both NMOS and PMOS. He elaborates the MOSFET concepts not operating in the way you would normally think. The "in" is on the Drain terminal and the "out" is on the Source terminal of both NMOS and PMOS to demonstrate (with both MOSFET turned ON): 1) NMOS poorly pulls down but PMOS excels in pulling down the Source terminals when the Drain terminals are set to 0V, 2) NMOS excels in pulling up but PMOS poorly pulls up the Source terminals when the Drain terminals are set to Vdd. However, this is an oversimplification to convey the concept across using Vgs (as we all engineers learned it). In the actual construction, the body/bulk of both MOSFETs are not connected to their respective Source terminals, but instead to the Vdd (for PMOS) and to GND (for NMOS), so the Source and Drain terminals are interchangeable. This of course makes the value of Vt variable (which is now dependent on the voltage on the Drain and Source terminals [but this is off topic]).
Wow! I love how you explain it in a easy way without making it complex. And also beautiful english.
thank you so much i was struggling to understand this for so long
Very well explained! Im studying for my electrical engeneering degree and my current course is impossibly hard. You delighted my day ^_^
Perfect explanation, it really help me to undestand.
Thank you so much for your explanation. I watched lots of videos but your explanation was understandable. Thank you so much ❤
this channel is underrated
Such a good video. Deserves more views.
Great video, now I understand!
I had one of those “OHHHHHHH” moments watching this lol
You missed about the MOS body diode and how to prevent it by tying the body of NMOS to GND and PMOS to VDD. Also it is important to note that the transmission gate cannot be built using typical off-the-shelf PMOS and NMOS because their bodies are always tied to the Source. One exception is CD4007, which can still be bought (although very rare nowadays) to build one. I know you have other video addressing related topic (body effect), but I thought it is important to mention it here to not misled the audiences into thinking that they can easily build one using typical MOSFETs.
Thank you! I specifically searched for an explanation, why the body diode doesn't ruin everything!
Amazing video sir...😃
thanks
hey Jordan , question please why the voltage drain source is equal to zero?
Thanks dude 😁
thank you
I liked this video :)
3:20
!! nmos is not good at passing zero ? ? is it true ?
aslo you said @ 5:26 nmos isn't good for passing Vdd ,! which one is true ? first educate yourself then earn money in patreon
NMOS is good at passing 0V, PMOS is good at passing Vdd, he propably just got confused, in the rest of the video he says it right.
at 5:03 I think you drew the wrong Source and Drain.
agree
No, this is a PMOS transistor. Source is higher than drain.
LUV U from KR
why the hell are you labeling the source in the same spot for both pmos and nmos, thats literally not how it works.
He is correct in his labeling for both NMOS and PMOS. He elaborates the MOSFET concepts not operating in the way you would normally think. The "in" is on the Drain terminal and the "out" is on the Source terminal of both NMOS and PMOS to demonstrate (with both MOSFET turned ON):
1) NMOS poorly pulls down but PMOS excels in pulling down the Source terminals when the Drain terminals are set to 0V,
2) NMOS excels in pulling up but PMOS poorly pulls up the Source terminals when the Drain terminals are set to Vdd.
However, this is an oversimplification to convey the concept across using Vgs (as we all engineers learned it). In the actual construction, the body/bulk of both MOSFETs are not connected to their respective Source terminals, but instead to the Vdd (for PMOS) and to GND (for NMOS), so the Source and Drain terminals are interchangeable. This of course makes the value of Vt variable (which is now dependent on the voltage on the Drain and Source terminals [but this is off topic]).