Відео

Too bad the icestick has become so expensive lately. It seems all FPGA tools have had price increases that doubled the prices.

10.12.2024

10.12.2024

Thank you for your tutorial

Can read data from it

hi, thanks for such nice video. can you make a video on spi interface through PS

Hi, I am having a problem while creating application project. I have followed both the parts carefully, but when creating a project on Vitis IDE, while selecting a template at 1:47 both the next and finish buttons are disabled except for the blank C and empty C++ project, and by doing so I do not have platform and configs libraries and headers

Great sir you saved me.😊

Dear friend Please, I have a problem during reading the status of an output switch on Zybo Z7-10. I use Vitis to program the Zynq processor with Gpio connected to a slid switch. I make the switch (input2) status as a condition as shown in the program below if (D == 1) ; The following program works only when the input2 signal that was connected to Gpio IP starts from ("1") but the program does not work when input2 signal starts from ("0"). ////////// while (1) { D = XGpio_DiscreteRead(&input2, 1); // input2 from a slide switch if (D == 1) { sum_all = XGpio_DiscreteRead(&input, 1); // input is a 32-bit data printf("%x " , sum_all); sleep (1); } else { XGpio_DiscreteWrite(&output, 1, 0); // output is a LED printf("No_Signal "); sleep (1); } } ///////////// i.e. the program works only when I change input2 from "1" to "0" but does not work when the input2 start changes from "0" to "1".

Thank you! I've been losing my mind trying to figure out how to use this stick. I don't understand why fpga's are so damn not beginner-friendly

Do you know how to write out the bitstream from Vivado to the flash, to keep the design after power 🚴‍♂️

I'm trying out your hdmi firmware on a xilinx based zybo. However when connecting it to my tv's hdmi port I'm not seeing an image. I wonder if I need to set the tv some how or power the dev board via a power adapter instead of via the USB from my laptop

Hi, Dom. When you use XGpio_DiscreteRead() and XGpio_DiscreteWrite(). How do you know if you should use channel 1? Is it because in the AXI_GPIO IP you didn't enable dual channel, and the default channel is 1?

|x1 + x2| is not necessary |x1| + |x2|, when x1 and x2 are complex numbers. Therefore, I think when you are calculating |e^{jw}|, you have an error.

Hey @Dom I am doing a QPSK implementation on zedboard can i get any resources for this like how to implement sine waves and how to load serial data and how to add noise in fpga ....please if you can help that would be great.

would it (example design) work the same with zynqmp ultrascale?

can i get master.xdc??

This was amazing. It's always so rare to have somone who can speak english normally making these videos

thank you sir !

having a HPS in this case is easier than all pure Artix-7.

If you can then who will be the best programmer for them sir please help me

Sir LMCX0640C-3TN144C all ready in other pcb can we reprogram it

Sir your watsup number send please humble request

Hello sir how are you

Thank you for your video!

Does Active HDL come bundled free with the Lattice synthesizer (either the free Propel/Diamond, or the subscription Diamond)? Any other tools that you find useful? Anything from SynaptiCAD? Or Amaranth-lang HDL (nMigen/Whitequark) vs Migen/LiteX (Enjoy-Digital)?

can we do this without block diagram ?? do the processing system have internal memory to store the program. and if ,we can store ,how much we can store in the internal memory

Thanks my brother 🫂

Do we need the Cortex A9 to have an operating system (Ubuntu?) for it to function? I mean, the FPGA uses the bitstream to process signals. And therefore what processes the app built with C (the NOT operation)? If yes, did you have an SD card with some Linux of sort on your board as you demonstrated the NOT gate communicating with the AND gate in the video?

😂 was about to consider buying a De10-Lite anyway

Hi Dom, can you tell me your Pin Planner? i´m trying to run your project.

Thanks. Come back and do more tutorials

Can you wire external 5/0 v digital inputs to the mod pins instead of using their buttons and switches?

Great Video, Well explained 10/10

amazing video. It was very helpful. I have some question may i have a small exchange with you please???

Bla bla bli bli bu 😅

my good man, you are the best teacher.🙏 all the documents i have been trying to understand for the past one week was a wast. how come they didn't make it as simple as this one?😭

thanks for the big picture explanation to help us all get on the same page of what is going on. It is really helpful.

I really appreciate you in not only explaining what you are trying to do, but also explaining other terms and buttons and features surrounding what you are trying to do to help get a bigger picture of why and how we are this thing in vivado. thanks

so here AND gate giving one output signal. what to do if i need all four combination on input for operating four different code in PS part?

I don't have "xgiop.h". What can I do to first download and install it ?

Thank you so much for such a great tutorial, but i dont have any fpga present with me, so how can i test my file ?

Brilliant video. Really appreciate it. No other material on youtube explained it so easily. I could apply the same principles to my PYNQ boards.

Great video, thank you! How did you select what core in the Zynq was to run the ‘Not’ code?

@Dom-bo8wd this walkthrough is really really excellent.

Hey Dom, you're a hero and a blessing. Having someone someone walk you through everything you need is something I feel like lots of professional lecturers forget or don't realize to do. Although I've programmed before, due to not knowing how prepare the PL for use beside PS I've avoided Vivado at all costs. I will share this video and your channel to my peers. Thanks!

Great video, where did you learn how to do this? Can you point out any good learning material or other example projects? I'm attempting do do something similar but I'm looking to stream data to the Zynq and out over an ethernet port.

PS is ASIC, it is not programmable gate array like PL part

great video , thank you verry much 😉😉😉

damn dude blow your nose away from the mic