Hey Dom, you're a hero and a blessing. Having someone someone walk you through everything you need is something I feel like lots of professional lecturers forget or don't realize to do. Although I've programmed before, due to not knowing how prepare the PL for use beside PS I've avoided Vivado at all costs. I will share this video and your channel to my peers. Thanks!
I figured out how to use multiple switches with the XGpio commands. I took Dom's code and modified it a little here. I made my BTN, MY_SW and LED arrays are 2 bits wide. I'm sure there's a better way using "masks" to set and clear bits, but I wanted to make the fewest changes possible to make this example helpful. Thank you Dom for paving most of the path to success! #include #include "platform.h" #include "xgpio.h" #include "xparameters.h" #include "xil_printf.h" int main() { init_platform(); XGpio input; XGpio output; int a; // a is the input to the NOT gate int y; // y is the output of the NOT gate // Initialize AXI Gpio XGpio_Initialize(&input,XPAR_AXI_GPIO_0_DEVICE_ID); XGpio_Initialize(&output,XPAR_AXI_GPIO_1_DEVICE_ID); // Code XGpio_SetDataDirection(&input,1,1); XGpio_SetDataDirection(&output,1,0); print("Running"); while(1) { a = XGpio_DiscreteRead(&input,1); if (a == 1) { y = 2; } else if (a == 2) { y = 1; } else if (a == 3) { y = 0; } else { y = 3; } XGpio_DiscreteWrite(&output,1,y); } cleanup_platform(); return 0; }
Thank you, Dom. I'm quite frustrated after I tried the GPIO tests from other guys. I believed there is something wrong on their demo/code. You states the most important part step-by-step which helps me out. Hope it helps others from the beginning.
Once again, many thanks. What a great set of videos! I think I'll try and do the whole thing in reverse (AND in software, NOT on PL) to see if I've retained anything... 😀
Very cool, I got all the way through this example using my MiniZed board. Now the next step is to create a FSBL and an image file, then set the QSPI (non-volatile memory) to boot up this code. This would complete a "Bare Metal" project.
Hey, I see you got this working with a MiniZed, I was wondering if you would/could share your code/project. I tried to do this with a MiniZed but I have the LED turning on only when I use the Arduino header (my SW2) connected to ground, the button (PS_PB) has no impact on the state of the LED. Whiling looking for the correct pin names I may have figured out some of my issue. I assumed the push button was the one I was using but I was using the PL_PS instead of PS_PB. I will update my code and verify when i get back to my board and update my comment here based on that outcome. K
Tested my board with my new insights and information with no success. The LED turns on when either SW1 or SW2 is low. This seems to suggest that I have it somehow setup as an IR gate instead of an AND gate. Any help, suggestions or sharing of your code/project would be very much appreciated. Thanks K
Great video, where did you learn how to do this? Can you point out any good learning material or other example projects? I'm attempting do do something similar but I'm looking to stream data to the Zynq and out over an ethernet port.
Thanks! I looked at an example of making an LED blink through the axi gpio, then just connected it to the PL to see if it would work and it did! I think stacy from FPGAforbeginners channel has an ethernet video?
my good man, you are the best teacher.🙏 all the documents i have been trying to understand for the past one week was a wast. how come they didn't make it as simple as this one?😭
Do we need the Cortex A9 to have an operating system (Ubuntu?) for it to function? I mean, the FPGA uses the bitstream to process signals. And therefore what processes the app built with C (the NOT operation)? If yes, did you have an SD card with some Linux of sort on your board as you demonstrated the NOT gate communicating with the AND gate in the video?
Spectacular tutorial!!! Thank you for going into detail on all explanations ESPECIALLY the "C" programming part!!! I have really been struggling to find and documentation or anyone explaining as well as you did!!! Can anyone please direct me to documentation for the "C" part of the the SDK (VITIS)? Thanks again!!!
Hi, I am having a problem while creating application project. I have followed both the parts carefully, but when creating a project on Vitis IDE, while selecting a template at 1:47 both the next and finish buttons are disabled except for the blank C and empty C++ project, and by doing so I do not have platform and configs libraries and headers
Bummer thing: SDK is no longer available on versions after 2019.1. They've integrated everything into a new tool called Vitis. That's another learning curve I don't want right now though. I was trying to use Vivado 2020.2 and couldn't find SDK.
WHAT???!! Oh no, that's taken the steam outta me, I was just about to go and try it. On my 2022.2... OTOH, I have an older installation somewhere (the last one that worked with Windoze 7) can't remember the number offhand, 2016? 2019? Maybe that will work. PS. It's 2019.2. Damn. Wouldn't you know! Any good Vitis HLS videos about?
Great Video! I have one question, is it possible to use only programmable logic part of Zync 7000 chip without using ARM part of the chip (both I/O should directly communicate to FPGA fabric) ?
Hey @Dom I am doing a QPSK implementation on zedboard can i get any resources for this like how to implement sine waves and how to load serial data and how to add noise in fpga ....please if you can help that would be great.
One question: Launch on hardware means Programming the microprocessor? and program will be there even after power reset? Or does that mean just run that program on microprocessor and you need to do that again if power-reset?
Launch on hardware means program the processor. The program will not stay after power reset unless it is stored in the flash or an SD card. Please view this link: reference.digilentinc.com/learn/programmable-logic/tutorials/zedboard-programming-guide/start Although you may not have this FPGA board, the process is very similar for most xilinx boards.
To program FPGA and microprocessor(microcontroller?) permanently, what we need to do? Bit file program Flash of FPGA ? and what file goes in microprocessor(or this goes also in flash)?
Okay, the FPGA and Processor share the same flash, however this is not on-chip boot memory like in an atmel chip. The bitstream file and software files for the processor are stored in the flash, and read when the board powers on.
For Vitis, you can disable a lot of stuff you don't need :D I have everything in a VM and cannot waste 100s of GB to spill my host... I think both Vivado and Vitis 2022.2 take around 86 GB for 7 Series (Arty A7, S7, Z7, ...) and another 60 for Petalinux and one linux project...
Xil_print.h is the library for the xilinx function "print()" which has less overhead than printf. If you just want to use printf than you only need stio.h
Thanks for this video, it'll help me a lot for starting my hardware implementation. A question, if i'm using Vivado HLS for the FPGA design part. The first video is automatically generated or I need to configure the hardware part too ? From Vivado HLS, I have a packaged IP with Checkpoint format, can I use it directly on SDK ? Thanks in advance!
can we do this without block diagram ?? do the processing system have internal memory to store the program. and if ,we can store ,how much we can store in the internal memory
One last request. This example uses a single discrete. Can you please show us how to do this same example using an array? For example, I was using 2 sets of switched and LEDs. This code worked, but only 1 of the LEDs responds to this code. I tried to alter it to make the variables arrays, but the DiscreteRead and DiscreteWrite functions don't like arrays. Maybe it's possible that another set of function exist that work with arrays.
Hi, Dom. When you use XGpio_DiscreteRead() and XGpio_DiscreteWrite(). How do you know if you should use channel 1? Is it because in the AXI_GPIO IP you didn't enable dual channel, and the default channel is 1?
Hello Dear I have implemented the same project on my Zedboard. I am able to execute the project succesfully but I am no seeing any message "We are up" on the SDK terminal. Can you please guide what could be the reason ?
It involves transmitting data from the PS and to the io pins using FPGA fabric. If you wanted to transfer the data from PS to PL, you can just hook up your RTL code to the Axigpio instance that is the output of the PS. Just one way of doing it
You would do the same design, but add the clock port in your RTL module. Then, right click on that port in the block diagram, and select "make external." That will creat an external connection to your clock for the RTL that you can map to your clock pin using the xdc constraints file.
why i got this error when i choose in available template Hello world? " This application requires a Uart IP in the hardware." whereas i am using zynq 7000 zedboard. is this problem with hardware or something else?
@@Dom-bo8wd i solved that error, but my final output is not coming. i uploaded program successfully and i am also not getting message "we are up". is my uart is not working?
Hello Sir video was really helpful but i have completed the entire process till program FPGA in SDK.After the as you explained we have to do Run as and then Launch on hardware .After doing launch on hardware I am getting error as "AP transaction error,DAP status f0000021".After searching a lot also I couldn't able to resolve that .Please let me know how to solve it. thank you
In your block diagram you are using M_AXI_GP0 from the Zynq IP, and M00_AXI & M01_AXI on the AXI Interconnect. In your C code you use XPAR_AXI_GPIO_0_DEVICE_ID & same with 1; I assume these GPIO_0/1 apply to the AXI Interconnect. What if you have M_AXI_GP1 as well? How with XPAR_AXI_.. does it know M_AXI_GP0 from M_AXI_GP1 to then specify the device ID? Or does it know based off the name of the AXI GPIO module? So if I call my AXI GPIO module led_lightshow (vs axi_gpio_0 & axi_gpio_1 in your example), my C code would be XPAR_LED_LIGHTSHOW_DEVICE_ID for the parameter?
Switches are connected on PL, so it was controlled in verilog HDL by AND logic but how led connected on PL side can be controlled by PS through axi gpio since led is not connected on PS.
The AXI GPIO in this case is acting like an access channel connecting the PS through the PL to the LED. It is acting similar to a wire running from the PS, to the PL out the IO blocks to the LED. Please ask more questions if you are still confused.
@@muhammadahmed-og9jq yes. If I understand your question you have a few options here. 1). You can just tie another LED output to the axi gpio instance, and that will make two LEDS come on at the same time. 2). You can double click on the output axi gpio and enable a dual channel. I am not sure if both channels can be outputs so you need to do some research. Then you have to change the software around but basically you could have one axi gpio instance controlling two LEDS. 3). You can instantiate another axi gpio block in the block diagram and use that. 4). You can take the output of the existing axi gpio output instance and route it (in the block diagram) to an LED, then also route it to some more RTL code that you create. The output of that RTL code you can then map to another LED. To insert the RTL into the block diagram, remember you must have the block diagram open in vivado, and right click on your RTL file in the "sources" tab, then click "add module to block diagram." Thanks and I hope this helps 😊
Probably the best intro tutorial for Xilinx embedded flow I've seen.
Hey Dom, you're a hero and a blessing. Having someone someone walk you through everything you need is something I feel like lots of professional lecturers forget or don't realize to do. Although I've programmed before, due to not knowing how prepare the PL for use beside PS I've avoided Vivado at all costs. I will share this video and your channel to my peers. Thanks!
Thank you so much for watching and commenting! Im glad it helped ☺️
Thank you. This is a very detailed example of the basic interaction of PS and PL. Very inspiring
Thank you very much.
I have followed both videos exactly as explained and changed the .xdc file of ZedBoard and it's working perfectly.
I figured out how to use multiple switches with the XGpio commands. I took Dom's code and modified it a little here. I made my BTN, MY_SW and LED arrays are 2 bits wide. I'm sure there's a better way using "masks" to set and clear bits, but I wanted to make the fewest changes possible to make this example helpful.
Thank you Dom for paving most of the path to success!
#include
#include "platform.h"
#include "xgpio.h"
#include "xparameters.h"
#include "xil_printf.h"
int main()
{
init_platform();
XGpio input;
XGpio output;
int a; // a is the input to the NOT gate
int y; // y is the output of the NOT gate
// Initialize AXI Gpio
XGpio_Initialize(&input,XPAR_AXI_GPIO_0_DEVICE_ID);
XGpio_Initialize(&output,XPAR_AXI_GPIO_1_DEVICE_ID);
// Code
XGpio_SetDataDirection(&input,1,1);
XGpio_SetDataDirection(&output,1,0);
print("Running");
while(1)
{
a = XGpio_DiscreteRead(&input,1);
if (a == 1)
{
y = 2;
}
else if (a == 2)
{
y = 1;
}
else if (a == 3)
{
y = 0;
}
else
{
y = 3;
}
XGpio_DiscreteWrite(&output,1,y);
}
cleanup_platform();
return 0;
}
thanks for the big picture explanation to help us all get on the same page of what is going on. It is really helpful.
I'm following from part 1. I just want to offer my thanks for this great video.
Are you working with SDK or Vitis if I may ask?
Nice job explaining the basics of AXI and how it binds FPGA logic to the CPU. Thanks!!
It is a great video with clear explanations
Thank you for sharing this informative video. It was very helpful to me.
Thank you for the amazing video!! I'm waiting for another video to be uploaded.
It was very useful! Thank you, and waiting for more!
Very nice video. Please make more such videos.
It is a good example for me,I just learned zynq for two weeks.
Thank you, Dom. I'm quite frustrated after I tried the GPIO tests from other guys. I believed there is something wrong on their demo/code. You states the most important part step-by-step which helps me out. Hope it helps others from the beginning.
thanks a lot .. following these 2 parts I was able to do the same things on a Zynq104 MPSoC Board [ Programmed via SD boot ]
Thank you for a very understandable explanation of this.
Great video! Could you do a similar video using Vitis instead of SDK?
extremely helpful video. thank you!
Great content and explanation
Once again, many thanks. What a great set of videos!
I think I'll try and do the whole thing in reverse (AND in software, NOT on PL) to see if I've retained anything...
😀
Great tutorial for beginners! Thank you!
The next step is to do a BSP, then create a boot-image. This is Tutorial #4 or #5 of the MicroZed Chronicles by Adam Taylor.
Wonderful tutorial. Thx
Very cool, I got all the way through this example using my MiniZed board. Now the next step is to create a FSBL and an image file, then set the QSPI (non-volatile memory) to boot up this code. This would complete a "Bare Metal" project.
Hey,
I see you got this working with a MiniZed, I was wondering if you would/could share your code/project. I tried to do this with a MiniZed but I have the LED turning on only when I use the Arduino header (my SW2) connected to ground, the button (PS_PB) has no impact on the state of the LED.
Whiling looking for the correct pin names I may have figured out some of my issue. I assumed the push button was the one I was using but I was using the PL_PS instead of PS_PB. I will update my code and verify when i get back to my board and update my comment here based on that outcome.
K
Tested my board with my new insights and information with no success. The LED turns on when either SW1 or SW2 is low. This seems to suggest that I have it somehow setup as an IR gate instead of an AND gate.
Any help, suggestions or sharing of your code/project would be very much appreciated.
Thanks
K
You just saved me man. Thank you so much!!!
Glad to help!
what a enlightening piece of engineering. Thanks man. It was so compact yet so powerful.
Good tutorial!! I just follow this video and then I made it!!!!
Glad you liked it!
Thank you so much, I am new to SDK. It is very helpful !!
:DD Made me grin :D I just thought "ow, that's opposite of Atmel" and the you said it :D
Great video, where did you learn how to do this? Can you point out any good learning material or other example projects? I'm attempting do do something similar but I'm looking to stream data to the Zynq and out over an ethernet port.
Thanks! I looked at an example of making an LED blink through the axi gpio, then just connected it to the PL to see if it would work and it did! I think stacy from FPGAforbeginners channel has an ethernet video?
This is one of the videos in her ethernet series. Maybe it could help? ua-cam.com/users/livevs0rCiJ2kSs?si=19d0soTQbX0c2k2m
Great video, thank you! How did you select what core in the Zynq was to run the ‘Not’ code?
Great sir you saved me.😊
my good man, you are the best teacher.🙏 all the documents i have been trying to understand for the past one week was a wast. how come they didn't make it as simple as this one?😭
Haha thank you! Im glad you enjoyed it!
Do we need the Cortex A9 to have an operating system (Ubuntu?) for it to function? I mean, the FPGA uses the bitstream to process signals. And therefore what processes the app built with C (the NOT operation)? If yes, did you have an SD card with some Linux of sort on your board as you demonstrated the NOT gate communicating with the AND gate in the video?
no operating system needed. Its just a bare metal program based off the "hello world" application which doesnt need an OS either.
Spectacular tutorial!!! Thank you for going into detail on all explanations ESPECIALLY the "C" programming part!!! I have really been struggling to find and documentation or anyone explaining as well as you did!!! Can anyone please direct me to documentation for the "C" part of the the SDK (VITIS)?
Thanks again!!!
If you have found any documentation on that matter, I'm interested too. Thanks !
hi, thanks for such nice video. can you make a video on spi interface through PS
Hi, I am having a problem while creating application project. I have followed both the parts carefully, but when creating a project on Vitis IDE, while selecting a template at 1:47 both the next and finish buttons are disabled except for the blank C and empty C++ project, and by doing so I do not have platform and configs libraries and headers
Thank you Dom !! u made the whole thing look like a breeze! can u pls let me know where can i get good useful info on the xilinx library functions ?
Found the great one again ty 😊
Thank you for your video!
Bummer thing: SDK is no longer available on versions after 2019.1. They've integrated everything into a new tool called Vitis. That's another learning curve I don't want right now though. I was trying to use Vivado 2020.2 and couldn't find SDK.
Yes, I did watch a video on Vitis and it looks extremely similar to SDK as far as this project's flow. I need to play around with it.
WHAT???!!
Oh no, that's taken the steam outta me, I was just about to go and try it. On my 2022.2...
OTOH, I have an older installation somewhere (the last one that worked with Windoze 7) can't remember the number offhand, 2016? 2019?
Maybe that will work.
PS. It's 2019.2. Damn. Wouldn't you know!
Any good Vitis HLS videos about?
Thank you so much for such a great tutorial, but i dont have any fpga present with me, so how can i test my file ?
Bravo! Thank you Dom.
Great Video! I have one question, is it possible to use only programmable logic part of Zync 7000 chip without using ARM part of the chip (both I/O should directly communicate to FPGA fabric) ?
Hey @Dom I am doing a QPSK implementation on zedboard can i get any resources for this like how to implement sine waves and how to load serial data and how to add noise in fpga ....please if you can help that would be great.
One question: Launch on hardware means Programming the microprocessor? and program will be there even after power reset? Or does that mean just run that program on microprocessor and you need to do that again if power-reset?
Launch on hardware means program the processor. The program will not stay after power reset unless it is stored in the flash or an SD card. Please view this link: reference.digilentinc.com/learn/programmable-logic/tutorials/zedboard-programming-guide/start
Although you may not have this FPGA board, the process is very similar for most xilinx boards.
To program FPGA and microprocessor(microcontroller?) permanently, what we need to do? Bit file program Flash of FPGA ? and what file goes in microprocessor(or this goes also in flash)?
Okay, the FPGA and Processor share the same flash, however this is not on-chip boot memory like in an atmel chip. The bitstream file and software files for the processor are stored in the flash, and read when the board powers on.
For Vitis, you can disable a lot of stuff you don't need :D I have everything in a VM and cannot waste 100s of GB to spill my host... I think both Vivado and Vitis 2022.2 take around 86 GB for 7 Series (Arty A7, S7, Z7, ...) and another 60 for Petalinux and one linux project...
Thanks, a great Tutorial. Should it be Xil_print?
Really looking forward for your next video.
Xil_print.h is the library for the xilinx function "print()" which has less overhead than printf. If you just want to use printf than you only need stio.h
*stdio.h
This is really helpful!
Thanks for this video, it'll help me a lot for starting my hardware implementation. A question, if i'm using Vivado HLS for the FPGA design part. The first video is automatically generated or I need to configure the hardware part too ? From Vivado HLS, I have a packaged IP with Checkpoint format, can I use it directly on SDK ? Thanks in advance!
can we do this without block diagram ??
do the processing system have internal memory to store the program.
and if ,we can store ,how much we can store in the internal memory
Was it microprocessor or microcontroller?
Its a microprocessor :)
Very helpfull. Thank you.
One last request. This example uses a single discrete. Can you please show us how to do this same example using an array? For example, I was using 2 sets of switched and LEDs. This code worked, but only 1 of the LEDs responds to this code. I tried to alter it to make the variables arrays, but the DiscreteRead and DiscreteWrite functions don't like arrays. Maybe it's possible that another set of function exist that work with arrays.
Hi, Dom. When you use XGpio_DiscreteRead() and XGpio_DiscreteWrite(). How do you know if you should use channel 1? Is it because in the AXI_GPIO IP you didn't enable dual channel, and the default channel is 1?
Hi. Kindly proceed me link if you have made a video to create a bin file and how to boot from SD card.ty
superb.
Hello Dear I have implemented the same project on my Zedboard. I am able to execute the project succesfully but I am no seeing any message "We are up" on the SDK terminal. Can you please guide what could be the reason ?
if this works for me, you have just in 2 videos explained simply, what a bunch of xilinx documents and tutorials complicates the heck out of :)
Haha I know your struggle all to well 😅. I really hope it works! 1
@@Dom-bo8wd it worked like a charm, so now i have some hope for my exams! :D
Glad to hear it!! Thanks for watching!!
Does this part involve transmitting data from ps to pl?
It involves transmitting data from the PS and to the io pins using FPGA fabric. If you wanted to transfer the data from PS to PL, you can just hook up your RTL code to the Axigpio instance that is the output of the PS. Just one way of doing it
thanks for the videos!
how would i do the connection if the PL design have a clk?
You would do the same design, but add the clock port in your RTL module. Then, right click on that port in the block diagram, and select "make external." That will creat an external connection to your clock for the RTL that you can map to your clock pin using the xdc constraints file.
@@Dom-bo8wd got it working thanks
on my zynq when I do run as -> launch on hardware, it throws error, Memory write error at 0x100000. APB AP transaction error, DAP status f0000021
I am using pynq z1 board
why i got this error when i choose in available template Hello world? " This application requires a Uart IP in the hardware." whereas i am using zynq 7000 zedboard. is this problem with hardware or something else?
There are two uart cores in the zynq processor
You could try the other one and see if that gives you the same error
@@Dom-bo8wd i solved that error, but my final output is not coming. i uploaded program successfully and i am also not getting message "we are up". is my uart is not working?
Hello Sir
video was really helpful but i have completed the entire process till program FPGA in SDK.After the as you explained we have to do Run as and then Launch on hardware .After doing launch on hardware I am getting error as "AP transaction error,DAP status f0000021".After searching a lot also I couldn't able to resolve that .Please let me know how to solve it.
thank you
I am only getting .elf file but not .c file after launch on hardware step.
Awesome
Thank you so much
thank you sir !
Thanks a lot man!
In your block diagram you are using M_AXI_GP0 from the Zynq IP, and M00_AXI & M01_AXI on the AXI Interconnect. In your C code you use XPAR_AXI_GPIO_0_DEVICE_ID & same with 1; I assume these GPIO_0/1 apply to the AXI Interconnect. What if you have M_AXI_GP1 as well? How with XPAR_AXI_.. does it know M_AXI_GP0 from M_AXI_GP1 to then specify the device ID? Or does it know based off the name of the AXI GPIO module? So if I call my AXI GPIO module led_lightshow (vs axi_gpio_0 & axi_gpio_1 in your example), my C code would be XPAR_LED_LIGHTSHOW_DEVICE_ID for the parameter?
Thanks my brother 🫂
thanks!
Thank!
고마워요
thanks!!
Switches are connected on PL, so it was controlled in verilog HDL by AND logic but how led connected on PL side can be controlled by PS through axi gpio since led is not connected on PS.
The AXI GPIO in this case is acting like an access channel connecting the PS through the PL to the LED. It is acting similar to a wire running from the PS, to the PL out the IO blocks to the LED. Please ask more questions if you are still confused.
Got the point. Thanks
I can use output of PS (led) in PL(input) and make some decision in PL verilog code and then switch another led in PL ?
@@muhammadahmed-og9jq yes. If I understand your question you have a few options here.
1). You can just tie another LED output to the axi gpio instance, and that will make two LEDS come on at the same time.
2). You can double click on the output axi gpio and enable a dual channel. I am not sure if both channels can be outputs so you need to do some research. Then you have to change the software around but basically you could have one axi gpio instance controlling two LEDS.
3). You can instantiate another axi gpio block in the block diagram and use that.
4). You can take the output of the existing axi gpio output instance and route it (in the block diagram) to an LED, then also route it to some more RTL code that you create. The output of that RTL code you can then map to another LED. To insert the RTL into the block diagram, remember you must have the block diagram open in vivado, and right click on your RTL file in the "sources" tab, then click "add module to block diagram."
Thanks and I hope this helps 😊
Now it is Vitis IDE
10.12.2024
I guess u could have just wrote:
Write(&output,1,!read(&input,1));