Hardware/Software Co-design in Zynq Ultrascale+ MPSoC

[@felipeferreira1960]

Extremely educational and explanatory video. I hope you continue with them. Thank you very much.

[@rizwantariq1523]

Thanks you for your kind words

[@mohammed_mairajuddin_musharraf]

Awesome and precise explanation. Great job.

[@rizwantariq1523]

Thanks alot :)

[@zonglehuang4147]

One of the clearest and best videos I have ever seen ! really helps me a lot !!!

[@rizwantariq1523]

Thank you so much. I am glad, you found these concepts useful 🙂

[@khalidaboushhiwa]

Clear and concise ..Bravo Rizwan

[@rizwantariq1523]

Thanks Khalid

[@faizanahmad7134]

This video was awesome and very informative. I had a little request that can you also make videos related to using PL and PS simultaneously while also using the DDR4 memory. For example, implementing FFT in the PL and showing results using PS and also showing how the results are written in DDR4 memory and then how to read from it directly. Thank you so much!

[@rizwantariq1523]

Thanks for the kind comment. I am little occupied now a days. I plan to make videos again, but it could take some time.

[@frederikvanaverbeke8840]

Good video, man. Quite the presentations skills you have!

[@rizwantariq1523]

Thanks alot Frederik. means alot (Y)

[@frederikvanaverbeke8840]

@@rizwantariq1523 I am new to FPGAs but I am an engineer with some coding skills. Can you recommend me a tutorial or video of a starter project in a Zinq MPSoC? Litterally starter... making an LED blink or so.

[@rizwantariq1523]

@@frederikvanaverbeke8840 There are a few things to consider.
- your Zynq FPGA board may be different than others. Each Zynq FPGA can have different pins. So it's a bit tricky to find the tutorial for the same FPGA sometimes.
There are plenty of youtube tutorials, but they may be blinking leds from the processor, from HDL, or on entirely different boards.
Here is what I would like to suggest.
- Follow any tutorial for your specific Zynq FPGA. Just so that you can get familiar with its interfaces etc., just try to implement a simple 'And Gate' or OR Gate.
Go through the process of simulating the 'And Gate' and then implementing the And gate.
If you are not able to find the tutorial for your specific Zynq FPGA. Then follow any other simpler tutorial and try to replicate it for your FPGA.
As you already have some coding background, i am sure you will be able to solve it.

[@Brookieleeee]

Thank you so much for the clear explanation video

[@rizwantariq1523]

Your Welcome :)

[@salikhafeez4037]

Very informative !!! great work 👍

[@rizwantariq1523]

Thanks Salik. Glad you found it useful :)

[@iam_hyp]

Nice Explanation Jazakallah

[@rizwantariq1523]

Jazakallah Alabe :)

[@Parvi_]

Very well explained. Thanks

[@rizwantariq1523]

You're welcome Razi. I'm glad it helped you :)

[@shilpashreehs4868]

Very clear and understandable. Thanks!

[@rizwantariq1523]

@Shilpashree Thanks Alot :) Glad you found it useful :)

[@AnuSingh-sk1pj]

Hi Rizwan
thank you for the this wonderful video.
I am very new with the board . I was having one query if you help me with that.
Is it linux or writting code required at PS side if I only want to deal with FPGA and verilog code and want to see the result of my verilog code?
i mean is it possible to handle only PL things without developing anything on PS side in the beginning carrier?

[@rizwantariq1523]

Yes, if you only want to work with verilog designs, then you can just focus on the PL part.
PS is usually used for software development in C/C++

[@ninn5572]

Great job man

[@rizwantariq1523]

Thanks alot ninn55 :)

[@mubasheer5584]

Thank you sir 😍

[@rizwantariq1523]

You're welcome Mubasheer. :)