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Rizwan Tariq
Germany
Приєднався 19 лис 2020
PhD Candidate based in Berlin, working on Accelerating AI models on FPGAs.
Here you will find various discussions around Artificial Intelligence, Semiconductors (FPGAs, ASICs), and Technology in general.
🚀 Connect with me, and let's expand our knowledge together!
Have a great day!
Here you will find various discussions around Artificial Intelligence, Semiconductors (FPGAs, ASICs), and Technology in general.
🚀 Connect with me, and let's expand our knowledge together!
Have a great day!
FPGA Based Fault-Tolerant Fused and Branched CNN Accelerator With Reconfigurable Capabilities
The environment surrounding semiconductor chips is constantly changing, whether in deep space or on Earth. In space, radiation and extreme temperatures can significantly impact the behavior and reliability of semiconductor chips, while on Earth, factors such as temperature, humidity, and vibrations can also influence their performance and dependability.
Additionally, the requirements for AI systems are continually evolving. The number of sensors are also continuously increasing, and with that new data is being collected everyday. This would mean that, you have new Accuracy, computation and latency requirements after every couple of months.
To address these dynamic environmental conditions and fluctuating AI requirements, we need semiconductor chips capable of adapting to such changes.
In this academic-style, in-depth video, I will explore a reconfigurable CNN accelerator designed to operate in three distinct modes: high reliability, high performance, and aging-reduction mode.
Paper: FPGA Implementation of a Fault-Tolerant Fused and Branched CNN Accelerator With Reconfigurable Capabilities
IEEE Paper Link: ieeexplore.ieee.org/abstract/document/10506477
♻ Like, Share, and Subscribe if you like the video and find it useful.
🚀 Connect with me, and let's expand our knowledge together!
LinkedIn: www.linkedin.com/in/syedrizwantariq/
Instagram: rizwan_tariqs
X (Twitter): x.com/RizwanTariqSye1
Check out this playlist to to learn Topics related to FPGA
ua-cam.com/play/PLF900l36orjsTQM1Csal98cmLe3q7C5L-.html
Additionally, the requirements for AI systems are continually evolving. The number of sensors are also continuously increasing, and with that new data is being collected everyday. This would mean that, you have new Accuracy, computation and latency requirements after every couple of months.
To address these dynamic environmental conditions and fluctuating AI requirements, we need semiconductor chips capable of adapting to such changes.
In this academic-style, in-depth video, I will explore a reconfigurable CNN accelerator designed to operate in three distinct modes: high reliability, high performance, and aging-reduction mode.
Paper: FPGA Implementation of a Fault-Tolerant Fused and Branched CNN Accelerator With Reconfigurable Capabilities
IEEE Paper Link: ieeexplore.ieee.org/abstract/document/10506477
♻ Like, Share, and Subscribe if you like the video and find it useful.
🚀 Connect with me, and let's expand our knowledge together!
LinkedIn: www.linkedin.com/in/syedrizwantariq/
Instagram: rizwan_tariqs
X (Twitter): x.com/RizwanTariqSye1
Check out this playlist to to learn Topics related to FPGA
ua-cam.com/play/PLF900l36orjsTQM1Csal98cmLe3q7C5L-.html
Переглядів: 136
Відео
Shared Layers Approach for Efficient CNNs Mapping on Hardware
Переглядів 11114 днів тому
Discover how Convolutional Neural Networks (CNNs) are transforming AI applications like image classification, video processing, and pattern recognition. However, Mapping CNN models on hardware faces significant challenges due to high computation and energy requirements. In this video, we explore the shared layers methodology method to optimize CNN accelerators for multi-modal tasks, achieving o...
The Ultimate Tool for Neural Networks Diagrams
Переглядів 44428 днів тому
Unlock the power of neural network visualization with NN-SVG! 🧠💻 In this video, we dive deep into NN-SVG, the game-changing web tool for creating beautiful, publication-ready neural network architecture diagrams. Whether you're a researcher, student, or AI enthusiast, this tutorial will show you how to effortlessly design professional-quality schematics for your papers, presentations, and blog ...
The Future of Processors: Self-Adaptive RISC-V on FPGA
Переглядів 123Місяць тому
Imagine a multicore processor design that adapts to your needs in real time, whether it's High Performance, Fault Tolerance, or energy efficiency. That's exactly what we've built. Over the past weeks I and my colleague, have explored the implementation of self-adaptive RISC-V cores on AMD Arty FPGA. This Quad-Core RISC-V design is reconfigurable (or self-adaptive), which means it can reconfigur...
Fault Resilience Analysis of Quantized Deep Neural Networks - Research Paper [English Language]
Переглядів 3763 роки тому
This is the recorded version of my presentation at the MIEL 2021 Conference. Neural Networks models will eventually be deployed on the Hardware. And Hardware is prone to faults; therefore, it is interesting to study the impact of faults in the Neural Network Models. In the presentation, I have discussed the factors that can impact the reliability of neural networks. I have performed a comprehen...
Hard Core and Soft Core Processors Implementations: Clearly Explained
Переглядів 4,3 тис.3 роки тому
We come across Hard Cores and Soft Cores very often in the FPGA design and Development. Softcore does not imply that it can only be implemented on FPGA. It just means it is licensed as synthesizable HDL (Verilog/VHDL) code. The buyer can synthesize it into ASIC as well using ASIC libraries. And In the video, I have discussed the pros and cons when this soft-core is mapped (or implemented) on AS...
Zynq Ultrascale+ MPSoC Ultra96-V2 - Hello World Project
Переглядів 15 тис.3 роки тому
Hello World is always a good idea. It helps us familiarize ourselves with the tool and the workflow. In this video, We have implemented our first project on Zynq Ultrascale MPSoC Ultra96-V2 Board. I have gone through the whole process of Vivado Block design and Xilinx SDK development. Hope you will enjoy it. Understand the Fundamentals of Hardware/Software Co-design in Zynq Ultrascale MPSoC via...
Hardware/Software Co-design in Zynq Ultrascale+ MPSoC
Переглядів 6 тис.3 роки тому
HW/SW co-design has become extremely relevant in today's Embedded Systems. Modern embedded systems consist of software and dedicated hardware components that interact with each other to fulfill their tasks. During the development of such heterogeneous systems, both hardware and software have to be designed jointly, resulting in the discipline of hardware/software co-design. In this video, I hav...
Xilinx Vivado Installation and Ultra96 V2 BDF setup (Windows OS)
Переглядів 1,8 тис.3 роки тому
Before we start designing our hardware and software, we have to install Xilinx Vivado. So in this video, I am showing the step-by-step procedure to install Vivado on windows OS. The Xilinx software, as downloaded and installed, will only contain the Xilinx supported Board Definition Files (BDF). It is necessary to install the AvNet provided BDF for the Ultra96-V2. There are few additional steps...
Zynq UltraScale+ MPSoC Ultra96 V2 Getting Started Tutorial for beginners
Переглядів 7 тис.3 роки тому
This video will help you get started with the ultra96 v2 board. I have explained all the details in a step-by-step manner. The Ultra96-V2 is an Arm-based, Xilinx Zynq UltraScale ™ MPSoC development board. For such a small form factor and it has a lot to offer. The main attractive features of this board are the Quad Core Arm Cortex-A53, Dual-core Arm Cortex-R5 with 2GB ram tightly coupled with t...
🤯🤯🤯🤯wow
yeah that's crazy
Where they are going to use these chips? For AI?
Currently, these chips are not that advanced. They work really well on some specific problems, but they don't perform well on general problems. So, it's gonna take some time for them to be used for AI.
@@rizwantariq1523when they work seamlessly with ai, our world will never be the same, for good or for worse it will never be the same. I’m at least optimistic that the world can utilize it to optimize our day to day lives. Maybe it could come up with a solution to world peace? Who really knows the theoretical possibilities are endless.
@@jakevicknair5262 Loved your comment. Yes, you are right. Let's hope we utilize this technology for the betterment of humans and bring peace to the world.
Yeh but what problem would take that long ? Like what question is this
The name of the problem was RCS ( Random Circuit Sampling). RSC is a benchmark for measuring quantum progress.
China is now eyeing to copy it?
Wow, this tool is so cool!
Hi Rizwan, Can you elaborate it?
Hi @dineshdange5883 I plan to make detailed video on the topic of self-adaptive multicore processors. do you have any specific question in this regard ?
thanks! this is exactly what I was looking for. it made me want to know how to use more cores but I think I can use petalinux for that.
Glad it was helpful!
Soo nice
Sincere Hill
A wonderful set of videos (this one and another three mentioned at the beginning of this video), very well explained. I'd like to ask whether there is any more clips? Also, please increase the voice level for future ones.
Thanks alot for the feedback :)
Hi Rizwan thank you for the this wonderful video. I am very new with the board . I was having one query if you help me with that. Is it linux or writting code required at PS side if I only want to deal with FPGA and verilog code and want to see the result of my verilog code? i mean is it possible to handle only PL things without developing anything on PS side in the beginning carrier?
Yes, if you only want to work with verilog designs, then you can just focus on the PL part. PS is usually used for software development in C/C++
worth watching as it is informative
Thank you for a very good video on the Ultra96-V2 that was easy to follow. Looking forward to the rest of the playlist.
I am using it now. I cannot find the xilinix vivado in Vivado archive under 2019.1. What do I do?
I am using 2023.1 without any issues, so try that.
Extremely educational and explanatory video. I hope you continue with them. Thank you very much.
Thanks you for your kind words
Extremely educational and explanatory video. I hope you continue with them. Thank you very much.
Hey, I am not able to see the network on my PC after complete boot up. Can you please help me with this
can you check if the board's wifi is functional.
Please do a video about using just the FPGA chip with minimum circuitry on a breadboard.
I plan to start making videos again. Could you please explain a bit more, what do you mean by 'minimum circuitry' ? Do you want to control something on the breadboard using the FPGA Chip ?
@@rizwantariq1523 Most of the FPGAs being sold with boards. I wanted to know what is minimal circuit for an FPGA (without board) should have to power up, boot and loading up of a program through usb without controlling anything yet. I plan to buy just the chip instead of the entire board, running entirely on breadboards. A rat's nest if you will.
@@AstrobumTV Alright. so you dont need complete evalualtion board. but you need something minimal, which can still get you to play with FPGA etc. I think you should look at, 'System On Module' , also called as SOM. good with the keywords, "Zynq FPGA System On Module", you will find plenty of stuff.
This video was awesome and very informative. I had a little request that can you also make videos related to using PL and PS simultaneously while also using the DDR4 memory. For example, implementing FFT in the PL and showing results using PS and also showing how the results are written in DDR4 memory and then how to read from it directly. Thank you so much!
Thanks for the kind comment. I am little occupied now a days. I plan to make videos again, but it could take some time.
Awesome and precise explanation. Great job.
Thanks alot :)
I bought an Ultra 96-v2 on your advice. Thanks for your wonderful videos. Can you post more videos about ultra 96 v2?
Thank you for your comment. I am currently occupied with my on--going research. I hope to start making videos in few months.
Have you made any videos on Kria SoM, especially Ethernet and UART implementation? Please share the link.
@krishnananda Not yet. Now a days i am a bit occupied with my current research. I will get back to making more videos in Future.
@@rizwantariq1523 Okay. Thank You.
Great video for beginners like me!
Thanks buddy :)
Do you have a tutorial on installing Microblaze on Zynq US+ MPSoC?
I think I found it! This is so helpful
Good video, man. Quite the presentations skills you have!
Thanks alot Frederik. means alot (Y)
@@rizwantariq1523 I am new to FPGAs but I am an engineer with some coding skills. Can you recommend me a tutorial or video of a starter project in a Zinq MPSoC? Litterally starter... making an LED blink or so.
@@frederikvanaverbeke8840 There are a few things to consider. - your Zynq FPGA board may be different than others. Each Zynq FPGA can have different pins. So it's a bit tricky to find the tutorial for the same FPGA sometimes. There are plenty of youtube tutorials, but they may be blinking leds from the processor, from HDL, or on entirely different boards. Here is what I would like to suggest. - Follow any tutorial for your specific Zynq FPGA. Just so that you can get familiar with its interfaces etc., just try to implement a simple 'And Gate' or OR Gate. Go through the process of simulating the 'And Gate' and then implementing the And gate. If you are not able to find the tutorial for your specific Zynq FPGA. Then follow any other simpler tutorial and try to replicate it for your FPGA. As you already have some coding background, i am sure you will be able to solve it.
Clear and concise ..Bravo Rizwan
Thanks Khalid
Great OOB tutorial!
Thank you so much for the clear explanation video <3
Your Welcome :)
Thank you.
Your Welcome
Good content bro. Keep up the good work
is every fpga design require a processor
Hey, No. Its not necessary. for many years, FPGAs have been in the commercial use without the processor.
Hi, what is the maximum power in watts this board consumes if we run at max configuration? Any rough idea?
Hi, in case I power off the 96Board. Will the Board behave next time it powered again. Thx!
Hey, when you switch off board. every thing gets erased. The work flow described in this video, requires you to program the board again after rebooting. In other words, if you switch off your FPGA board, and if you switch on again, you have to re-program your FPGA with the Bitstream and .elf file.
This was a wonderful presentation - I'm new to FPGAs and the concept of a soft core. Your video helped me to understand some things that have been unclear to me and I can see these technologies may be very useful in projects I am working. Tack!
Thanks alot for the appreciation :) I am glad it was helpful for you. If its not confidential , would you like to share what technologies are you working on and how can hard/softcores can help you in your projects ?
@@rizwantariq1523 Hej! I was trained as a mathematician, then had a career in mechanical engineering, and now, in retirement, I took up studying nematodes - small round worms, a model species that has a more or less complete connectome. Much is known about these little animals, for example, cell lists for the entire animal through its entire life cycle have been published, neural maps exist, and many other things, with quite a lot of accessible data that may allow for modeling whole animals at the cellular level. Much is known about the little worms but there is still much to be learned. At this point in my understanding, it appears that fpga might a useful technology to map cells to cores, allowing interesting and flexible constructions of models of morphology and behavior.
@Adelheid Marlowe Wao. . Thanks for the detailed reply. Wish you all the best for this. 👍
good , but do have tutorials about ZYNQ7000 devices ?
Sorry, i dont really have it. Actually I don't have the Zynq7000 board.
@@rizwantariq1523 thanks for your response
Many thx
The Ultrascale+ MPSoC has multiple ARM processors that can be used for different things so some of them can run linux while others run the user program and so on. I am not fully sure what it is the motivation behind its creation.
Heyy, If i understood your question correctly, you mean to ask, what is the reason behind a such a Board , which has FPGA Fabric and also has ARM cores. Short Answer is: HW/SW Co-Design. I have explained the concept of HW/SW Codesign it in detail in this video : ua-cam.com/video/xb7QBuBZuvI/v-deo.html&ab_channel=RizwanTariq
if the question is why there are multiple ARM Cores. In my opinion, the short answer is 'High Performance b/c of Multicore processing'. i.e. You can run four different applications on four processors etc.
Great job man
Thanks alot ninn55 :)
Really a great work Rizwan! I am also working on Hardware implementation of AI. Your work has always been helpful and inspirational. Thanks a lot!
Thanks alot Shilpashree for the kind words . 🙂 Glad to know that you are also working in the same area.
Brilliant. Keep up the good work. I can relate to this content as I am just getting started in this field. :) Best wishes.
Thank you so much Uzair for the continuous support. 🙂 . Good to know that you are also exploring this exciting field of AI.