SR latch using nand gates

[@novelaurhum7210]

Mam me Pakistan se hoon ap bht achi vedio bnate ho sb smjh a jata h ap bht ache teacher ho 😊😊😊

[@bhavnameena6176]

mam, you did a great job... I was very confused about this topic but now you put me at an ease.

[@006Koyel_saha]

Ap ne channel ka name ekdom sehi rakha hai ..Jo ap Kar dete hai padhai ko ..thank you so much ma'am 🤗❤️

[@jasmeetkaur3099]

U r the only person who made me understand this concept ❤

[@shivamchoudharysanatani]

Mam apki vedio bht help krti h

[@fahadfirozz]

ma'am aap ka voice bahot sweet hai..❣

[@afzalamin5036]

Mam you are mistaken invalid state will be when both the s and r are 0 and no change will be when both the s and r are 1

[@premprasad3851]

Really asaan padhai , but effective👍

[@rohitchimane8285]

Very good experience in teaching

[@SaM__H-K]

abi to ap ka channel subscribe karna hi pary ga q k 20 say zada video dekh li ha sub video bohat achi ha

[@priyanshupandey2513]

I've been looking for the reason why they use complements of S and R for a long time, thankyou.

[@Unknown-ob1xy]

Same question bruh! Ma'am pls explain 😢

[@nasagaming8060]

Apne bahut achche se aur kam samay me hi sajha diaya

[@asisadhikary2706]

great explanation mam...

[@jayeshpg]

Nice explanation

[@osamashaikh8495]

Best 👍 content

[@biggiestud9451]

pyaari mil to sai kisi jga aese kia faida teri videos ka 😋😋😋😋😋😋😋😋

[@abdurrehmanawan8759]

Mam can you make a video on SR Latch with Control input..........
and great job Mam

[@sakshishinde7003]

Mam, aap SR ke truth table mein S aur R ki value kaise assume karte hoo..

[@aasaanpadhaai]

two inputs ke jo 4 possible combinations hote hain unke saath ek baar previous state 0 aur ek baar 1 assume karke

[@sakshishinde7003]

@@aasaanpadhaai Thank you so much mam, app bahot asaani se topics easy karke padhate Hoo✨💯

[@saniasiddiquemuhammadsiddi8737]

​@@aasaanpadhaai iski samaj nai aiii

[@sushantgupta4757]

Thanku so much ma'am

[@HK-en3rn]

Nice

[@kakalichemistrytutorial]

Thank you ma'am

[@omsoni4528]

Thank u mam ❤️🙏

[@Pooja-fy1bn]

Thanks mam 😊

[@shahrukhkhan8993]

wowww

[@Mr.Stranger2107]

Thank you so much

[@Pinkrose-t5j]

Thanks mam

[@shivamchoudharysanatani]

Thnk u so much mam jii

[@The.Ganesh.50]

Mam Latch me previous output se koi matlab nhi hota to phir aap NOR latch me previous value kyu le rhi h

[@batmanvsjoker6259]

Mam Nor Gate main Aapne R upar liya , S neeche liya tha ..
Par nand main S upar liya , R neeche ..?
Kyu??

[@professor929]

Thanks

[@sheikhinamofficial1984]

for input 0 0 its forbidden state in case of nand sr latch

[@debasreetenyson5386]

it is when we are giving S and R in the inputs but here in this implementation the inputs given are S' and R'.

[@MaheshSekhar]

Its wrong.. During nand gate we will get the reverse o/p not the same as per NOR gate.

[@aasaanpadhaai]

S means set R means reset....keeping this thing in mind I did the connections so as to get same op

[@MaheshSekhar]

@@aasaanpadhaai so ma'am can we say its correct ?? Because in your another video ( SR LATCH USING NOR GATE) We got the same output.

[@kamalkumar-nh4nc]

@@MaheshSekhar mam took S| and R| so nor and nand came out same

[@muhammadmujtaba2457]

the truth table is wrong

[@RaushanKumar-rm5iq]

Thanks mam 😊