hi sir, your explanation is awesome please explain the concept in an easy way, without taking more flipflops, so that it will be esay for all to understand other things are perfect
really nice sir.. can u please the information provide the information regarding what are the challenges that we encounter in placement and routing . what are the rules should follow for macro placement..
The amount of hardwork you are putting in preparing this lectures is really appreciable....very nicely explained...Thank you so much sir👍👍
I want c continue to next class sir
You are great helps to us sir
Which drive strength buffers used for building clk tree and y
Please continue to upload videos..
sir do you have the part2?
Awesome sir
Sir please upload next lectures of Cts. Thank you.
Please upload next videos
hi sir,
your explanation is awesome please explain the concept in an easy way, without taking more flipflops, so that it will be esay for all to understand other things are perfect
Hi Sir, it was a nice video, could you please post your next continuing video.
thanq so much sir....
sir, kindly upload next lecture of it..!!
Hi sir,
It was really a nice video explaining everything in sequence.
Can we hope to get next video lesson of this series?
I think we can do high fanout net synthesis method to avoid the problem
Sir when will u release it's next video
really nice sir.. can u please the information provide the information regarding what are the challenges that we encounter in placement and routing . what are the rules should follow for macro placement..
Sir... Giving multiple clock inputs may avoid the problem
When will be part 2
Sir when will u release it's next video y
Karan Aggarwal some time end of next week
VLSI EXPERT thank u sir
VLSI EXPERT can u suggest something from where should I study placement and power routing ?
@@vlsiexpert how do we get further more videos of yours sir? It's been a while you haven't uploaded anything regarding CTS..