CLK_L7- Challange in Fixing Setup and Hold Violation Using Clock Skew (Part 1)

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  • Опубліковано 7 лис 2024
  • We will discuss,
    1) What are the different technique of fixing Setup and hold violation only using Clock skew.
    2) Challenges in each approach.
    3) Which one is recommended and why ?
    Please refer other Lectures also.
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    VLSI EXPERT GROUP

КОМЕНТАРІ • 5

  • @9336611680
    @9336611680 3 роки тому +1

    mauj aa gyi sir....kya mast smjhata hai tm..thnks alot sir ji!!!!!

  • @shaikali4600
    @shaikali4600 4 роки тому +1

    superrrrrrrrrrrrrrrrrrr...........

  • @coastalfly5508
    @coastalfly5508 3 роки тому

    Is this the method of fixing hold violations by clock pulling method?

  • @chandusai3120
    @chandusai3120 2 роки тому

    Sir adding buffer that will change the entire logic how can we remove