CLK_L9 - Fixing Large No of Hold Violation using Clock Skew (Part1)

Lecture 9 of Clock series.
Here we have discussed 1 technique to fix Large number of Hold violation using the Clock Skew.
For more detail- Recommend to listen previous lectures of this series.
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VLSI EXPERT GROUP

[@mohammedjaseel7461]

Very helpful lecture series. Appreciate the hardwork that went into this presentation and making it open to public for free

[@nikhilkulkarni4398]

these lectures are very useful for me thanks for sharing your knowledge

[@Rishabh-be6uk]

Sir why we did not used LOCK UP LATCHES here for clock skew ?...as I studied different blogs,they suggested to use LL

[@sujeetomar5843]

The concept you have explained here are good , but how will you implement these in a chip where we have million of paths and lot many sign-off corners? Also, when you are removing the buffers , we can end up with new trans violations. you haven't mention how are you going to fix this?

[@vlsiexpert]

+Sujeet Omar I will do that part later on.

[@sandychauhan3555]

How global skew 4ns it ll be 6