CLK_L8- Challange in Fixing Setup and Hold Violation using Clock Skew (Part2)

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  • Опубліковано 9 лют 2025
  • We will discuss, Why it's not recommend To Touch Clock path for fixing specific Setup and Hold Violation or Say fixing less number of Violation.
    Please refer other Lectures also.
    For more update -
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    -Thanks
    VLSI EXPERT GROUP

КОМЕНТАРІ • 7

  • @sandeepkumareppili9687
    @sandeepkumareppili9687 Рік тому

    thank you so much sir🙂

  • @amarnathsircilla5283
    @amarnathsircilla5283 9 років тому +1

    all clk_L1 to clk_L8 explanation was very good learnt so much with these videos
    i need some more information about to reduce the setup time and hold time violation

    • @vlsiexpert
      @vlsiexpert  9 років тому

      +amar sircilla Stay tune. It will be the part of Next coming Lectures. Which will come soon.

  • @yaredweldegebrial23
    @yaredweldegebrial23 8 років тому +1

    thanks it iis good but what is the use of the buffer?

  • @ynsam
    @ynsam 9 років тому +2

    When is the next part coming?

    • @vlsiexpert
      @vlsiexpert  9 років тому

      +Yadnesh Samant Just Now Uploaded .. sorry for delay.

    • @ynsam
      @ynsam 9 років тому

      +VLSI EXPERT (vlsi EG) Great thanks