For more information, check these related videos on Adder and Subtractor: 1) Half Adder and Full adder ua-cam.com/video/5XbRIVWFRIw/v-deo.html 2) Ripple Carry Adder ua-cam.com/video/b70ZQwci5sY/v-deo.html 3) Half Subtractor and Full Subtractor ua-cam.com/video/lqN8xLTtdaA/v-deo.html
00:11 Designing a 4-bit subtractor circuit 02:57 Performing subtraction using an adder circuit with 2's complement 05:28 Performing subtraction using the adder circuit 08:01 Performing subtraction using a modified adder circuit. 10:42 XOR gate can be used for both addition and subtraction 13:23 Binary addition and subtraction using XOR gates and adder circuit 15:59 Performing subtraction using 2's complement form 18:21 The adder circuit can be used for addition and subtraction
It is just like a private lesson, a teacher teaches me topics I have no idea about detaily, thank you very much for saving me:))And also thanx for the subtitles sometimes because of the accent I cannot understand some parts and other than that when i speed up the video thanks to the subtitles i do not miss anything
sir your inglish is very gut. i want to take classes from you. i have a dream of securing full marks in inglish. when you say "The output of xor" hits different.❤
I have a question, why does the 2's complement checker does not work when you add two negative numbers? Ex. -2-1 = 1110 + 1111 = 11101. So the most significant bit, which is 1, is inverted and then it goes through a AND gate with the CTR value, but the result ends up being 0 (0 * 1) . Even though the result is in 2's complement form. PLS HELP, I have a project related to this. Thank you!
This 2's complement checker here only deals with unsigned integers (positive numbers only). We are only subtracting ONE unsigned integer from the other unsigned integer. They cannot both be negative, since the circuit can only convert one of them to its 2's complement representation. However, the 2's complement checker here is also not 100% correct, it fails to account for subtraction by zero, which will never output a carry bit and thus, the checker would mark the result as a 2's complement number when it isn't. What you are doing is adding two SIGNED integers. The inputs and outputs are already guaranteed to be in 2's complement, so you don't need a checker there. (You might need a checker to detect overflows (+ve + +ve = -ve) and underflows (-ve + -ve = +ve) which you can do by comparing the MSBs of the two inputs and the output)
Hi, I have tried to make the same the circuit on the circuit verse but upon doing the addition of 1111 and 1000 bits the carry out of the second 4bit adder is not giving the 1 bit as the output carry, so, do we need to need to get the output of the carry or borrow bit from the 1st 4bit adder module ?
Great explanation sir. What it the output from the And gate is 0, since A>B. We don't want it to do the 2's complement of B again and then add since A>B. How would the system know it's to stop if A>B.
If A > B, And if you are performing A - B, then you will get carry at the output. That means Co = 1. So, here since it is applied through invert to the AND gate, so the output of the AND gate will be 0. That means the output of the second ADDER is same as the output of the first adder. ( since XOR gate won't invert the S3, S2, S1 and S0 ouptuts of the first adder, and C0 for second adder will also be 0). I hope, it will clear your doubt.
@@ALLABOUTELECTRONICSThank you sir, I had to go back and look at it again, A0-A3 is 0, so it won't change the value of the 1st adder as you said the carry out it's applied through invert to AND gate.
Your explaination was awesome. But i have a doubt sir , if we add two 4 bits which results to get a 5 bit output then the carry output atlast will be not shown by this method because we use not gate and multiply with ctr. How to overcome this problem?
If you closely observe, C4 output is still available. Of course, the same signal is given to NOT gate and to AND gate. But in case, if the carry is generated then it will be available. Whether it is valid carry or not, that depends on the output of the AND gate. I hope, it will clear your doubt.
what would change if the operation was like -3 +4 , thats like my problem right now is how to represent the negative number , i know that there is 1's & 2's complement representation and there is a sign magnitude representation but in the implantation on the circuit how will the gate recognize if the most significant bit is a sign
sir i have one doubt in this, here we use bin0 as our control pin, as when bin0 = 0 , then the circuit perform addition, and when bin 0 = 1; the cicuit perform addition, but if we have our bin = 1 in addition case i.e if there is alreay a carry in , then we can't perform addition here.. it will do subtraction in that case. please clear this doubt
you need to connect the Cin input with CTR input only for the first block (The Least significant Block). Suppose you are cascading multiple such blocks then you can directly connect Cout of one block to Cin of the next block. In the next block, you don't need to connect CTR with Cin. You can check it manually or you can also simulate the same thing. I hope you got what I mean to say. If you still have any doubt then let me know here.
for the question (10-12) the answer would be 11110 when we calculate simply without using any circuit but in the final circuit while performing (10-12) the result concluded by (4-bit adder-2): s3s2s1s0 is 1100 with sign 1. while the answer should be 11110. no true form or 2s complement form. the answer should be 11110 which was given by single circuit, then why add the second?! please clearify.
Yes, It will work. But it is better to use the same arithmetic blocks for each bit. (rather than a little different arithmetic block/without inverter for LSB)
Since we are doing the subtraction in binary, 2s complement is preferred one. One might argue for 1s complement method instead of 2s complement, but in 1s complement representation we have two different representations for '0', which is convenient for implementation. I hope, it will clear your doubt.
But in calculator we don't have two display for input. We have only one display so we add serially like at first input 3 then input 2 and we get output 5. How we can design this type of circuit which will take input serially like real life calculator and we get output using memory flip flop and logic gate. I didn't find the answer how our real life calculator is working and saving the input in memory then add it to another and produces output.
@@ALLABOUTELECTRONICS I know it's for 4-bit unsigned numbers. The circuit only solves for when B is either positive or negative. What if A was either positive or negative too. We can have A-B, A+B and also -A-B. The question is for the scenario where -A-B needs to be solved for sir. Thank you.
The truth table for adder subtractor is already covered in the previous videos. For more information, you can check this video. ua-cam.com/video/5XbRIVWFRIw/v-deo.htmlsi=gNYYW1Ai8k_lLvwW
For more information, check these related videos on Adder and Subtractor:
1) Half Adder and Full adder
ua-cam.com/video/5XbRIVWFRIw/v-deo.html
2) Ripple Carry Adder
ua-cam.com/video/b70ZQwci5sY/v-deo.html
3) Half Subtractor and Full Subtractor
ua-cam.com/video/lqN8xLTtdaA/v-deo.html
you could explain in 20 minutes what my professor couldn't in 2 hours. THANK YOU
😂😂🪬 fact bro
Yes is the same matter 😂
😂😂
The slow build up to the actual topic is just awesome
this 20 min. video literary saved my day !!.. Thank you very much 🤩
00:11 Designing a 4-bit subtractor circuit
02:57 Performing subtraction using an adder circuit with 2's complement
05:28 Performing subtraction using the adder circuit
08:01 Performing subtraction using a modified adder circuit.
10:42 XOR gate can be used for both addition and subtraction
13:23 Binary addition and subtraction using XOR gates and adder circuit
15:59 Performing subtraction using 2's complement form
18:21 The adder circuit can be used for addition and subtraction
Better video than neso academy
It is just like a private lesson, a teacher teaches me topics I have no idea about detaily, thank you very much for saving me:))And also thanx for the subtitles sometimes because of the accent I cannot understand some parts and other than that when i speed up the video thanks to the subtitles i do not miss anything
This is the best explaination so far i have seen, thanks sir.
May God nature both everything you touch and involve yourself, Good health too
Literally the best video on this topic found so far 👍🔥
sir your inglish is very gut. i want to take classes from you. i have a dream of securing full marks in inglish. when you say "The output of xor" hits different.❤
WONDERFUL explanation sir! 👍
Good explaination ..! but while teaching the lecture please kindly use cursor mark.
Best video on this topic. Thanks a lot.
The best video I have seen ever😍
You saved my day... Thanks❤
your way of explanation is really awesome . It is very clear content to understand the concept . Thank you.
Very Informative video. Thanks
beautifully explained, thanks a lot
makasih sangat jelas dan sangat memabntu saya dalam mengerjakan LK Eldas terlebih lagi modul m-11
Very good class sir.......
It 's excellent explanation sir
This lecture is awesome !!!!
superb explanation sir ❤️❤️❤️🔥🔥
Damn good explanation! ❤️
You are a legend sir!
I have a question, why does the 2's complement checker does not work when you add two negative numbers? Ex. -2-1 = 1110 + 1111 = 11101. So the most significant bit, which is 1, is inverted and then it goes through a AND gate with the CTR value, but the result ends up being 0 (0 * 1) . Even though the result is in 2's complement form. PLS HELP, I have a project related to this. Thank you!
This 2's complement checker here only deals with unsigned integers (positive numbers only). We are only subtracting ONE unsigned integer from the other unsigned integer.
They cannot both be negative, since the circuit can only convert one of them to its 2's complement representation.
However, the 2's complement checker here is also not 100% correct, it fails to account for subtraction by zero, which will never output a carry bit and thus, the checker would mark the result as a 2's complement number when it isn't.
What you are doing is adding two SIGNED integers. The inputs and outputs are already guaranteed to be in 2's complement, so you don't need a checker there.
(You might need a checker to detect overflows (+ve + +ve = -ve) and underflows (-ve + -ve = +ve) which you can do by comparing the MSBs of the two inputs and the output)
@@Reydriel rare to see anime lovers learning digital electronics
@@igxniisan6996 Nerds, going to college? Ain't no way lmao
Hi, I have tried to make the same the circuit on the circuit verse but upon doing the addition of 1111 and 1000 bits the carry out of the second 4bit adder is not giving the 1 bit as the output carry, so, do we need to need to get the output of the carry or borrow bit from the 1st 4bit adder module ?
Really helpful 👍🏻
Nice bro very nicely explained 11:42 ❤
Very very Thank you!!!!!
wonderful explanation 👍
Today was my end sem exam nd i got this question in it
Fantastic. Thank you.
Very Nice 👌👍
Good video!
Great explanation sir.
What it the output from the And gate is 0, since A>B.
We don't want it to do the 2's complement of B again and then add since A>B. How would the system know it's to stop if A>B.
If A > B, And if you are performing A - B, then you will get carry at the output. That means Co = 1. So, here since it is applied through invert to the AND gate, so the output of the AND gate will be 0. That means the output of the second ADDER is same as the output of the first adder. ( since XOR gate won't invert the S3, S2, S1 and S0 ouptuts of the first adder, and C0 for second adder will also be 0). I hope, it will clear your doubt.
@@ALLABOUTELECTRONICSThank you sir, I had to go back and look at it again, A0-A3 is 0, so it won't change the value of the 1st adder as you said the carry out it's applied through invert to AND gate.
Please tell how does the circuit know that when the control is 0 or 1? and also how the circuit will know when the last carry4 will be ignored or not?
Your explaination was awesome. But i have a doubt sir , if we add two 4 bits which results to get a 5 bit output then the carry output atlast will be not shown by this method because we use not gate and multiply with ctr.
How to overcome this problem?
If you closely observe, C4 output is still available. Of course, the same signal is given to NOT gate and to AND gate. But in case, if the carry is generated then it will be available. Whether it is valid carry or not, that depends on the output of the AND gate. I hope, it will clear your doubt.
Nicely explained
Legend sir 👍❤
what would change if the operation was like -3 +4 , thats like my problem right now is how to represent the negative number , i know that there is 1's & 2's complement representation and there is a sign magnitude representation but in the implantation on the circuit how will the gate recognize if the most significant bit is a sign
This circuit is for the addition and subtraction of unsigned numbers. For the negative numbers ( 2s complete numbers), you need to modify the circuit.
sir i have one doubt in this, here we use bin0 as our control pin, as when bin0 = 0 , then the circuit perform addition, and when bin 0 = 1; the cicuit perform addition, but if we have our bin = 1 in addition case i.e if there is alreay a carry in , then we can't perform addition here.. it will do subtraction in that case.
please clear this doubt
you need to connect the Cin input with CTR input only for the first block (The Least significant Block). Suppose you are cascading multiple such blocks then you can directly connect Cout of one block to Cin of the next block. In the next block, you don't need to connect CTR with Cin.
You can check it manually or you can also simulate the same thing. I hope you got what I mean to say. If you still have any doubt then let me know here.
@@ALLABOUTELECTRONICS oh, now i visualise this sir, completely clear now , Thanks for the reply 😄
for the question (10-12) the answer would be 11110 when we calculate simply without using any circuit
but in the final circuit while performing (10-12) the result concluded by (4-bit adder-2): s3s2s1s0 is 1100 with sign 1.
while the answer should be 11110.
no true form or 2s complement form.
the answer should be 11110 which was given by single circuit, then why add the second?!
please clearify.
Superb
Sir clister clear sir thank you so much sir
Mast explanation sir ji❤❤❤
6:55 - My question here is instead of making carry=1 in the first bit why can't we remove the inverter of B in first bit and making carry=0 as usual?
Yes, It will work. But it is better to use the same arithmetic blocks for each bit. (rather than a little different arithmetic block/without inverter for LSB)
@@ALLABOUTELECTRONICSthank you
Can't we just add another XOR logic gate to Cout and then connect it with CTR ?
Hi would you please mention the timestamp where you are referring to in the video? It would be easy for me to answer your question.
WHAT IF THERE IS A NOT GATE BETWEEN CTRL AND THE FULL ADDER BLOCK
Thank you so much❤
so is setting the control to 1 subtracting and 0 adding
Yes, correct.
What if my carry is 1 and I want to do addition
Excellent
知識をありがとう
Thank so much bro 🥰🥰
can i get substraction using 1's complement
@@ChintanAk-c5s yes
I need code for this adder and subtractor in vhdl can you help us
TY
jAZKALLAH KHAIR
Amazing 😍
thank you so much
perfectoooooooooooooooooooooooooooooooooooooooooooooo
Control(mode) means ??
Thank you sir❤
Thanks brother
Thanks
why didi we used 2's complement for subtraction we could have took any other complement
Since we are doing the subtraction in binary, 2s complement is preferred one. One might argue for 1s complement method instead of 2s complement, but in 1s complement representation we have two different representations for '0', which is convenient for implementation.
I hope, it will clear your doubt.
@@ALLABOUTELECTRONICS thank you for such instant reply
Everything is so clear you teach so well ☺️
*Didi*
But in calculator we don't have two display for input. We have only one display so we add serially like at first input 3 then input 2 and we get output 5.
How we can design this type of circuit which will take input serially like real life calculator and we get output using memory flip flop and logic gate.
I didn't find the answer how our real life calculator is working and saving the input in memory then add it to another and produces output.
Why my professor are not as you
2×50=100mins bhi kam pad gye unhe
Nice
Okay
Also sir, it just talks about if B was either a negative or positive, what if A was either positive or negative.
This circuit is meant for the addition and subtraction of the two 4-bit unsigned numbers. It is not designed for the signed numbers.
@@ALLABOUTELECTRONICS I know it's for 4-bit unsigned numbers.
The circuit only solves for when B is either positive or negative. What if A was either positive or negative too. We can have A-B, A+B and also -A-B.
The question is for the scenario where -A-B needs to be solved for sir. Thank you.
The unsigned numbers will be non-negative. So, -A -B scenario won’t come. If you have two unsigned numbers then either you add them or subtract them.
@@ALLABOUTELECTRONICS ohh thank you very much sir 🙏
Bravo
How we wil ignore or last carry
How we will ignore or use last carry
Thank you so much ❤
U have no idea how much this channel helps!🥹
sir how C0=1 plz tell
Would you please mention the timestamp where you are referring to ?
please share this pdf
Am I the only one who is hearing 'five' fiuu
Anyway thank you sir
sir please give us the truth table
The truth table for adder subtractor is already covered in the previous videos. For more information, you can check this video.
ua-cam.com/video/5XbRIVWFRIw/v-deo.htmlsi=gNYYW1Ai8k_lLvwW
@@ALLABOUTELECTRONICS for 4 bit?
SIR PLZ CAN U MAKE VIDEO IN HINDI PLZ
This lecture is awesome !!!!