I have this idea that I’d like to expose all the registers and fields that are available in an FPGA (integrated with a hard processor system and accessible with mmap) via 9p but know very little about the nuts and bolts of the protocol. So I’m hoping to learn more soon
I don't see why you couldn't. I've written drivers with debug options that just read cpu registers or memory mapped IO for hardware and output it as a file in user space.
I will have some videos on that soon. The short answer is an authorization server. It stores the passwords, and everything checks in with the auth server to make sure a user is allowed to access things. 9p.io/sys/doc/auth.html
I have this idea that I’d like to expose all the registers and fields that are available in an FPGA (integrated with a hard processor system and accessible with mmap) via 9p but know very little about the nuts and bolts of the protocol. So I’m hoping to learn more soon
I don't see why you couldn't. I've written drivers with debug options that just read cpu registers or memory mapped IO for hardware and output it as a file in user space.
How do you secure such a network?
I will have some videos on that soon. The short answer is an authorization server. It stores the passwords, and everything checks in with the auth server to make sure a user is allowed to access things.
9p.io/sys/doc/auth.html
An auth server with ndb & factotum correctly set up
Why is the header called "fcall"?
man.9front.org/2/fcall