Many of us are old enough to remember “closed” network protocols, such as NetBEUI (Microsoft), Token Ring (IBM) and AppleTalk (Apple, obviously). All have disappear and TCP/IP, the open protocol is now dominant everywhere. There is no reason why an open ISA won’t dominate in the future.
Yes and remember as well WD also uses another older technology on the silicon as well, in there being an embedded 6502 processor, with 64k of ROM and RAM, which is used to bootstrap the main processor, feeding in the configuration file and doing housekeeping, as the core is now royalty free to use, and there is a lot of tools to develop for it, and it is both also RISC, and also incredibly small as well, fitting well in the RISC architecture. So small you can fit it into a ultra cheap processor sold as a toy.
The only thing that could be the fly in the ointment is that 486 and ARM have a standard that is controlled and understood. Risc-V is already split into two closed and open. Who will control compatibility?
@@tonysheerness2427 RISC-V Foundation will do that ... btw, that (standardization, research, promotion, providing resources and training) is their purpose and right to exist:) Don't forget that RISC-V itself IS the base layer providing compatibility. Anything else YOU invent and introduce to the platform (and that freely, which isn't a thing with X86 & ARM) is surplus, a gift or a relief. How could you possibly see that as something bad (like you asking in that direction)? With more, free and open diversity there will come opportunities! No offense or accusation: It is only ones OWN confusion and fears (based on unfamiliarity with the topic?) that gives this unfounded feeling of negative consequences. (This problem exists not only with processor-ISAs ... sadly).
I am looking forward to more variety in the processor market. It was an interesting time in the early 90s with Sun Sparc, Intel, MIPS, Motorola 680x0, PowerPC and Dec Alpha. It also seems we have much more flexibility today with Linux in that it is easily ported.
You say that, but, just look at the Snap vs flatpak vs etc... situation. The open source community is already at a pretty maxed capacity just doing things for different linux flavors on the SAME architecture. How will adding 10-15 more CPUs with different and non-standardized instruction sets benefit anyone outside of those with the money to pay people to make software for their specific platform? And yes, risc-v has stuff in theory to make things have basic minimums to prevent fragmentation but those have not produced the desired results, its uniform only on the most idealistically written marketing webpage.
@@TheRus13 Oh yes, a super-rare one, even more exotic than the Itanium! I never got my hands on one of these, as well. Another legend lost in the mists of time was the Transputer. I have seen these demonstrated, but never used one.
Yes, Kamol, I agree that this was an excellently done video, and I appreciate it very much. I especially like that it's being put out relatively toward the beginning of 2023, so that we have some kind of high-level overview of what RISC-V developments we might anticipate this year. I agree with others sentiments that this sort-of feels like another "birth era" in the computer industry (or perhaps "rebirth" would be a better adjective). It kind-of has the warm-fuzzy feelings somewhat similar to the historical mid-70s feel of the hobbyist S-100 bus market in which literally thousands of hobbyists participated in some small way or another in the road along which the MITS Altair 8800 and IMSAI 8080 (and some 6502 and Motorola 680x0 architectures) gradually morphed into the goal that some of us had at the time, namely a "personal computer" in every home. We weren't so prescient as to anticipate a "personal computer" in every pocket and in every car dashboard. The winners of that first round of personal-computer development were arguably those companies whose business-management acuity was greatest (and some would argue those who were just the darn best at turning the business idea of the personal computer into a profit-producing monopoly) such as the Bill Gates and Steve Jobs visionaries of the world. A side effect of the topsy-turvy growth of the industry is that the instruction set architecture for Intel/AMD x86-64, although powerful, is just a horrible messy nightmare, such that we should probably have special custom shrinks to provide psychiatrist help to those poor slobs who are still stuck writing x86 code at the assembler level. ARM came along later, so was a bit less terrible than x86. We see the current benefits in Apple M2 chips being able to accomplish the same amount of work at power levels much lower than equivalent x86-64 CPUs (although the $ cost might still be more expensive due to Apple's pricing philosophy). But time and time again it has been proven that for doing equivalent tasks using much less power, RISC beats CISC (unless you can design a custome CISC chip for your particular mix of instructions - which nobody ever does). There's really only about half-a-dozen major categories of instructions (and cross that orthogonally with various data types and sizes-in-bits-or-bytes) in a standard CPU core, and now that we've kinda-sorta figured out multithreading more-or-less sufficiently, it's almost always more efficient chip-die-real-estate-wise to have a simpler, more-orthogonal instruction set (that is, more toward the RISC end of the spectrum) than to waste a lot of die space on interpretting and executing huge instructions that are rarely used in practice. A better approach these days to rare instructions is to have a very-fast function call mechanism to something that, by default, is implemented in software, but if needed is special cases can be implemented as add-ons to the core RISC ISA so as to run really fast in hardware This approach would also probably be best for GPU architectures. We went all the way around the horn and made tens of billions for Nvidia (and mere billions for AMD and Intel) in making discrete GPUs, only to find out that this sort of thing would be best incorporated as optional parts of a CPU chip that shares the same memory space as the rest of the CPU (such as in the AI engines now incorporated in Apple chips and some specific 7040-series AMD chips). I can see the industry possibly marching even more in this direction under the umbrella of RISC-V.
I agree.....the world is changing faster than ever after COVID. More of us are looking at availability of our future supply chains for equipment and software and FINALLY!!! We are starting to plan ahead. I think RISK-V is going to play a big part in the computing world.
Greetings from across the pond near Albuquerque, New Mexico, USA. As we say in Texas (my home state), "DANG, Prof. Barnatt -- that was a fantastic update on RISC-V. Somebody throw me a towel!" It's like eating three big steaks at once, and now I need time to digest it all. Don't know about others, but I'm slowly getting more and more excited about RISC-V, especially since quite a few government agencies and corporations are getting on board. I really want to get a RISC-V SBC, but my instincts tell me to wait a bit longer for a much better payoff, so I'll wait -- but not much longer!
Many thanks for this support -- most appreciated. :) As you say, RISC-V SBCs will go on improving, and rapidly. The barrier to their use right now is already software, not hardware . . . but it will get there, as there is a lot of community support and interest.
Every kind of knowledge should be open and free for everybody! It's a shame that one has to pay for example for ISO- oder DIN-Definition-Documents or for learning materials that could be hosted and downloaded practically for free.
@@new-lviv Yes. This is a phenomenon also known as "freedom". Freedom is always a bit messy, offering too many choices. Leading to inevitable fragmentation. But, like, some might challenge that, well, that's kind of the point. That's what freedom is. That this is the definition of freedom. To make your own choices. And for that choice to be a real choice, it needs to be a free and open choice - which necessitates a wide array of possibilities. And, with everyone making their own varying choices, this inevitably leads to fragmentation. The underlying argument being that this is not a bug. It's a feature. It's supposed to look like this.
@@thesenamesaretaken Everyone always says that about the current Windows OS. The entire community was in an uproar when Windows 10 came out, totally different to the positive sentiment today.
@@jimtekkit I can't speak for 10 because I never used it. What I can say is, having moved straight from 7 to 11, that there is a lot about it that makes me cringe, as if they deliberately looked for bad parts of the smartphone ecosystem and brought those to the desktop. If it weren't for work and education I would abandon windows entirely at this point.
Yeah, at my job we make makes SoCs for industrial controllers and sensors. We're looking to make our own eFPGAs for the signal processing, ideally on the same chip as the sensor.
There's $15 FPGA dev boards that can run a RISC-V soft core at 100 MHz - granted it's the stripped down embedded processor, but more than enough to replace most microcontrollers.
Note that May 2011 "RISC-V" is very different from and incompatible with 2015's RISC-V 2.0. What was published in 2015 (RV{32,64}IMAFDC) is still compatible with RISC-V today and forever into the future -- just more features are being added on with time, but the core things will never change.
Great summary and insights. This is another aspect of how "computing" has become a commodity, and requires global equalisation (so not owned, directed, or defined by any one entity or country).
Historically there hasn't been a problem with ARM. It's been very, very cheap to license and has not been limited.. For the most part if you're making chips the cost of ARM should be largely meaningless. Open source not necessary for anyone in the business and RISC-V would have died off. But China is trying to get around trade sanctions. RISC-V is pretty much entirely about the very unequal entity of China. That's what this is about, not any high-mindedness.
Well if you like at the internet public statistics 1/2 of all users are on phones. So when they get a new phone and it has RISC-V as long as everything they use works as normal barely anyone will care. The problem will be when you get to the server market as almost everything is made for x86. To my knowledge they will not change from what they use unless there is a good reason to change. Then you have the desktop market. As almost everything is made for x86 or x86_64 moving to RISC-V or even Microsoft trying to move to ARM is a problem as almost everything designed for desktop is made for x86.
@@kyleolson8977 So is RISC-V a threat to the US and NATO? As a Pole, Canadian and Brit, that would concern me very much. Could it lead to defeating the power of Western sanctions on bad actors?
An excellent update and some great insight Chris. Thank you! Also, nothing lasts forever, as there are always new entrants into the IT space, Remember when Commodore, Atari, Sinclair et al seemed untouchable?,
RISC-V is fascinating. I hope these kind of update videos continue to do well on your channel because I always appreciate and look forward to them. For example, I always look forward to your quantum computing updates. Looking forward to your next video!
Thanks Perry. Views "permitting", I hope to now post a RISC-V annual update each March, just as I have done a quantum computing update in August for many years now.
@@ExplainingComputers Yes, definitely views permitting. Also, permit me to say, I liked the visuals of you talking to the audience with computer and video tech stuff on both sides of you on the table. Impressive young Jedi!
@@Remigrator A channel generally have more viewers than subscribers. Remember that most popular channels tend to ask their viewers to subscribe because as they say: "60% of our viewers aren't subscribed". Most people just watch a new video when it gets recommended and don't subscribe at all.
I'm mostly interested the lowish power (W) embedded platform SBCs where size, low power, price, and support are more important than raw speed. The RPi filled that while they were available... so sad what has happened.
I think your interest matches that of most makers. I'm now planning a video that will try to bring together what has happened in the maker SBC space, why, and where we may go next. Stay tuned! :)
@@builder396 well, kinda, the company raspberry pi foundation saw an opportunity to make loads of money and instead of selling to makers, learners and enthusiasts they have now prioritized selling them to big companies for automation (as its a perfect product for automation etc.)
Really good video, Christopher. Easy to understand explanations, well documented with links (we used to say "footnoted"). Ever since the early 1970's when I started building early computers using available microprocessors (Z80, 8008, M6800, CDP1802, etc.), I was told that RISC was "right around the corner". Well, here we are, and it appears we have finally found the corner...I think. Thank you for researching and documenting RISC progress. I am not sure I completely understand the advantages of RISC (other than the licensing issues), but I am confident you will teach me as we head down RISC highway. 😁
RISC has been a major technology for quite some time now, there are more ARM cores out in the wild than all other processors combines. RiscV is just a processor instruction set standard based on RISC that is open source meaning no licensing costs to those who wish to implement it in silicon. The disadvantage is that ARM provides core designs that can easily be integrated into SoC designs. With RiscV you are on your own.
The "R" in ARM stands for "RISC", by the way. Originally, the "Acorn RISC Machine", as it was created by Acorn in the UK. But then - in a joint venture with Apple (who'd used the ARM chip in their Newton product) and VLSI - they founded a new company for its further development, and as Apple and VLSI were also involved there, then the Acorn in the ARM name was substituted and, for the company, ARM stood for "Advanced RISC Machine". These days, the acronym officially stands for nothing. It's just a name and is no longer considered to be an acronym for anything. But, yeah, the ARM was born in the '80s in the Acorn Archimedes. I used one at school, when I was a kid. (And, truth is, though modern x86 chips still present a CISC instruction set for compatibility's sake, it's really a RISC chip, running microcode, under the hood and has been for a long time now. It just presents a CISC instruction set to the outside world, for "backwards compatibility", but its internals are actually RISC.)
Quite an eye opener. I remember eeading about RISC in byte magazine during 90s Very happy to see these recent developments all explained in such a clear way. Thx for posting.
Thanks for giving us a broader view of the path/s of development that RISC 5 is moving towards. You’re certainly correct in your assertion that chips will dominate national security priorities/concerns for all the technically advanced nations; in their forthcoming struggles for self-security and supremacy of market/s control. Always prescient in your observations, much appreciated.
Thank you for your thoughtful and informative dissertation re the state of RISC-V technology in 2023. 👍 It's a refreshing change from the (mere) regurgitation of numbers and/or static comparisons between existing pieces of hardware that one might find elsewhere.
Anyone else think that the "cluster" platform at 10:30 seems pretty bloated like me? I like SBC clusters that maintain a compact size and don't cost a fortune just for the backplane PCB. And the horizontal RPi compute modules just create huge layouts.
Risk V seems to be moving extremely fast compared to how other ISA's did (and are). I'm excited for the day we can launch an application and simply snap cores and accelerators together for a small batch of CPU's and/or MCU's, like we can today with multi-layer PCB's. Thanks for your thoroughness and another well presented and detailed video, Chris!
I'm sold on RISC-V! Not only is it open but the instruction set has a simple and elegant look to it. It definitely lends itself to parallel processing.
I think you're spot on with your closing statement. It feels to me like RISC-V has hit critical mass now so it'll be big, the question is how big. My guess is that it'll eat into Arm more than x86 at first, that just feels like a natural target for it.
The most important difference between RISC and CISC is that RISC can be implemented using mostly hard wired instruction decode and execution rather than make use of a micro code processor. This allows a higher throughput per clock cycle than a microcoded processor. Many CISC processors do make use of a fair amount of hard wired instruction decode and execution thanks to increased transistor counts. Still, the RISC style of hardware is easier to implement on a low power processor than CISC.
CISC only made sense in the early days of computing, when memory and storage where very expensive and highly limited in capacity, and power consumption was basically inconsequential. The emphasis was on making your compiled executables as small as possible. In today's computing world, those things are reversed.
@@johnhunt1725 CISC also makes sense if you are going to write your code in Assembler. Many CISC instruction sets are really like high level languages. As compilers evolved, it became easier to 'translate' high level language code into RISC instruction sets. I'd wager that very little ARM code is actually written in assembler (except for low level initialization routines), and that most ARM software is actually written in C, Ada, Python, or other high level languages.
@@johnhunt1725 Yes, this was the working hypothesis. When real RISC processors were released in the wild, it was found that real code density was very much better than feared, and barely worse than CISC. The reason is that RISC ISA's necessarily provide efficient, orthogonal machine codes for compilers.
@@KennethScharf 🤔Does anyone write anything for any platform in assembler anymore? I wouldn't be surprised if it's no longer a BS in CS degree requirement these days.
Interesting video. Hope RISC-V will follow the same success story like Linux. It is always better to have more choices. One day it may become another interesting SBC like Raspberry Pi.
@@jimmihenry While it is a small percentage, it is growing. It's about 2.94%, slightly higher than Chrome OS. Up from 2.19% a year ago. Windows dropped about 4% during that same period.
@@rgbii2 I tired Linux.Linux Puppy for a older laptop, oh boy what a journey! Had to scratch the boot loader from another revision, i accidentally downloaded a Japanese version to get the grub, well it was 3 am spend hours on that build... Because i am stubborn i made it. I also installed Arch it was way smoother, but only on a virtual machine. Linux is not a suitable daily rig OS sadly. Not even Ubuntu that spy's on you like Billy G. (G like gangster 🤣)
@@jimmihenry Depends a bit on hardware and distribution. Some 22 years ago I had no problems at all installing Redhat to dual boot on an IBM T20, and it has gotten to be much simpler since then e.g. with Ubuntu. It's essentially automatic now, and much the same goes for PC's. One slightly nasty thing to note is that current installers on big distributions such as Ubuntu won't work on very old x86 CPU's; you need to find a distribution which supports old hardware. As for daily use, the Linux ecosystem supports just about everything you are lilkely to do, and there are several ways to run Windows things if need be. Note that Linux will mount Windows filesystems, and packages such as Libre Office have good format conversion utilities. I have used Linux for 99% of everything I do since 1995. Distributions have included Slackware, Redhat, Distro Astro, Ubuntu and Ubuntu MATE (not forgetting Raspbian on the Pi), the choice is vast. In nearly thirty years I can remember paying for only one application, an Excel-like spreadsheet called Xess, and after 25 years the binary can still run on current Ubuntu (with a little hacking of the install script).
@@jimmihenry Hmm, I've been using Linux since around 1995. Nowadays, I have it running on most of my machines and on my wife's laptop. My children also use Linux both at home and at work. I have supported Linux both on servers and desktops from over a decade, in addition to Linux-based PBX systems. YMMV, as the Yanks say, but if you measure the success of Android which runs on top of a Linux kernel, you can hardly say that Linux has been a failure. I would gently suggest that your own personal experience does not define the success of Linux.
A good development! I remember all the historic architectures like MOS Technology MC6502/6510 and the PDP-11 by DEC but what I really loved was the MC68000 of Motorola in my Amiga computer. It was amazing and I was really able to write everything in assembler what I could imagine. Just time was the limit.😊
Good review, I don't think I can pack my thoughts in a single comment but I'll try 😊 1. ISA itself is open, but as you mentioned it all boils down to IP related to manufacturing of the cores. For non-US countries it gives some freedom out of embargo etc, as long as they can create and manufacture effective core 2. Even with free ISA I'm sure there are lot of patents that can create a mess during manufacturing of the CPU 3. With AMD, NVidia and other fabless companies they still risk a lot being tied to TSMC 4. I think that success in server computing will depend if AWS, Azure or Alibaba will be able to deliver a cost effective solution, with the last one having most incentive in being US independent 5. Desktop computer is another beast. On one hand we only need web browser today, on the other Windows is still strong especially in corporate computing and as long as MS will not cut ties with Qualcomm we are not going to get anywhere 6. EU has its own issue. Having only STM and being "green" by manufacturing CPUs in Asia now we need to acknowledge that is not as green and still start doing it within EU borders. A pill quite hard to swallow
Server != cloud != big 5 cloud providers. Adding another architecture will be easy for the big 5 than for pourer players. Europe also has NXP. Fabless production is the great enabler for new designs, TSMC monopoly is a problem compared to back when chips like 6502 could use an ecosystem of competing fabs that didn't own particular gate and transistor designs elements .
On the desktop side of things, the rise of mini-PCs says everything. The modular tower is on the way out, as you've already discussed. I also hope RISC-V leads to a significant de-bloating of operating systems and software. Using web browsers everywhere for everything has led to a significant degredation of our standards for software, and a phenomenal waste of processor cycles (and thus, energy and time).
I just worry about what this means for the more enthusiast and pro-sumer markets, where being able to build a machine that is exactly what you want in terms of specs and hardware is dominant. I just recently built my first server, and I don't think I would be able to do that if everything is SOCs and MiniPCs.
@@K9TheFirst1 Socketed SOCs with support for PCIE expansion is technically possible. Run the power efficient graphics on the soc, and when the extra omph is needed, the external GPU spins up. RAM might still be as it is, with SOC ram acting closer to cache than RAM.
I have to strongly disagree. The modular Midi Tower has two main advantages over SOCs and MiniPCs. 1. It can be used to cool off enormous amounts of energy without the computer becoming too loud. This cannot be done with an SOC and an SOC would always be significantly slower than such a cooled high-end computer in a midi tower. 2. You can upgrade the Midi Tower super cheap. I only have to replace the motherboard, the CPU and the RAM, I can mostly continue to use the rest. I've been doing it this way for many years now and it's the most cost-effective solution to have a lot of power and a sufficiently up-to-date computer at the same time. The SoC serves niches. As a secondary computer e.g. It's okay to watch Netflix, but a SoC will never displace my main computer in the Midi Tower. This is not possible just because of point 1.
It's only the Instruction Set that is open-source. Any real chip design to implement it is completely proprietary, and needs to be completely proven separately. And as companies add new instruction-set groups to try to overcome the abysmal performance of current RISC-V chips, it means software that uses these extensions will only run on specific sub-groups of RISC-V processors. Not sure how this is better than ARM designs, where both ISA and actual chip designs can be licensed for less than a from-scratch design of a RISC-V chip.
@@ExplainingComputers Yes, I understood that. However, the Chinese are blocked from any low-nanometer equipment now and will have to continue with the older equipment making slower chips. I doubt that ASML will sell them any, considering that any advanced chips will go straight to the PLA military buildup, and possibly transferred to Russia under the table.
Excellent updates on the RISC-V world! Thanks for all of your research for the update and overview of the architecture's history. I love how clearly you always present information and make it accessible to wide audiences (including the geekier types :P). Thank you.
Well summarised. I have recently built a Ryzen 5 5600g based matx desktop PC. I fervently hope that Open Source, RISC-V succeeds. Then, if I ever build another PC, it will likely be based on RISC-V which looks to have great potential. Thank You.
Odds are good you won't be able to build a computer in the sense you are thinking of with risc-v anymore than you can just go out and buy an ARM cpu and then go buy a motherboard you like with it currently. It will be like the M1/M2/etc.. Macs. You will just be buying the system, not the parts and all the pros and cons that brings.
RISC-V is really impressive. Especially, it is less complicated family like ARM series or PIC series. I just select the correct support instruction set features and I can compile the software into RISC-V core.
Thank you Chris for an interesting Sunday video, it's exciting & good to have healthy competition against X-86 & ARM (give them a bit of a kick). Risc-V will no doubt mature in a few years time & with some of the big tech companies behind it, it will spillover into end user devices whatever they may be!!
The adoption of RISC-V reminds me a lot of how the PIC microcontrollers basically wiped out the traditional CPU/RAM/EEPROM computer configurations in low cost applications. The ability for manufacturers to consolidate all those components (and PCB real estate) and save big money with a single-low cost chip is what completely changed that market. I don't think the question is whether RISC-V will change things, it's a question of what it will replace.
Looking at those press announcements, my (albeit perhaps optimistic) suspicions are that soon you'll have to do these bi-yearly, and then quarterly. Possibly before this year is out :) The big advantage for x86 and ARM is that they have already done a lot of heavy lifting for decades to find optimisations. Whereas the advantage of RISC-V is also, ironically, that x86 and ARM have done a lot of the theory of heavy lifting to find optimisations - not so much in untransferable proprietary code, but in the failures, procedures and methodology, and in many cases those workflows can be directly applied and so streamline the catch-up process. ML optimisation will also be a big thing in that regard. It's been a long road for x86 and ARM, but when you approach the limits of physics with little more to eek out of a single core without scalability issues, and all you're really doing is optimisation, then you can do little else but watch the underdog catch up. So, the end of that long game, and maybe not that long now, is not whether x86 and ARM will ultimately be faster - by any useful margin, but whether they're seen as cost effective, given their licensing. After all, in a double blind test, once the dust has settled on experimentation of recipes, can you _really_ taste a quantitative quality reduction from Kellogg's Corn Flakes to Supermarket X's own brand? Or is the only significant difference in your pocket?
The real problem is that x86(x64) is designed for a different market than RISC-V. x86 has a stupidly complicated instruction format, but the instruction decoding process is a drop in the bucket compared to the hardware needed for high-performance computing, and x86 does that really well. If x86 didn't have such a deeply entrenched ecosystem, a "cleaned up" x86 instruction format could be developed that would absolutely destroy everything in the high-performance market. RISC-V is reasonably simple, but it just can't compete at the high-end due to major compromises to satisfy the low-cost embedded market. Having read the RISC-V whitepapers, it's obvious the ISA was not designed for performance applications, and I doubt it will ever be competitive in that market, which is a shame. RISC-V is generating excitement because it's cheap, and it's possible that will affect consumer prices by a penny or two. It'll take something else to dethrone the dominance of x86/ARM in the PC and server market. ARM will be around for a long time, as it's the certification and verification tools that really matter when you're developing a complete system, and RISC-V can't (and will never) hold a candle to that.
@@Waccoon Excellent points, Waccoon. Many I'd not fully considered. I think a lot of possibilities still lie in multicore RISC-V. Tho this massively multicore space is GPU space more than CPU space, it'll still be interesting where edge [in both senses of extraneous and edge computing] cases lie. NVIDIA has stated replacing Falcon with RISC-V, and I think RISC-V does perhaps sit in this middle ground, somewhere between CPU and GPU, which, for ML TPU driven development, might be an interesting space. The Esperanto ET-SoC-1 being perhaps the biggest/fastest proposal in this space so far. And while I certainly don't doubt your arguments and research here, I guess I'm just more optimistic about things we don't know yet :) In that the more these get pushed out to research markets, the more unexpected use cases/modifications will appear. Either way, it's going to be fun to watch, and will push all markets, that's the main thing :)
If there's one thing that a tech company loves and it's licence free intellectual property that ensures that they make more profit. I think RISC-V will do well once it gets up to speed and gets more adopters.
A good and thorough review as usual! I think Google wanting RISC-V as tier 1 android hardware is good news for the prospects of RISC-V based SoCs having decent GPUs embedded, though sadly I suspect they'll still be proprietary GPU cores for a long while yet. Personally, while I'm not sold on the RISC-V ISA itself as an 'ideal' platform, it is fantastic that the industry is moving towards a more open ecosystem and making some dent in the x86 & arm hegemony. x86 (even with 64bit extensions) is a horribly archaic ISA with far too much legacy holding back any progress potential, and ARM is just far too proprietary. To complement RISC-V in the move towards more open ecosystems, there are two shifts in the industry I'd love to see. An open GPU core akin to RISC-V, and RapidIO being adopted and replacing PCI-E as the dominant / standard interconnect. RapidIO is an open standard, and superior to PCI-E in many ways, but its adoption is still relegated to niche and specialized applications. I can dream. :D
There is a huge hole in the market between the best desktop processors (M2 Ultra, i13900, 7950X) and servers. AMD used to fill it with ultra expensive Threadrippers. Intel used to sell the desktop Xeons, but both of those are gone now. I'd love to see RISCV fill that gap. 32 ultra fast cores with 4 or 8 DDR5 memory channels.
It will be a long time before that may happen. RISC-V is likely to be used in the embedded market, then probably servers. These are applications that generally use new code or code that can be recompiled. Mobile and desktop are more dependent on pre-installed software, so these are more difficult to transition.
I don't see much changing in the personal computing space due to how prevalent the specific x86 and arm instruction sets are within programs without some generous compatibility layer stuff. But for Embedded this could have some big impacts and i am gearing up to get to learning the intricacies of RISC-V as it is pretty clear these will become a common tool in the toolbox.
Apple has changed ISA in their desktop computers more than once. Both times they've used a combination of "fat binaries" containing machine code for both systems as well as emulation to keep software running. The overhead from emulation has also been used as an incentive to compile to the newer architecture. Given how much Apple likes to control their stack, they could very well be among the first to push RISC-V to desktop computing, at least if they didn't _just_ switch to ARM so recently. The prior instance by the way was switching from PowerPC to x86, and they're reusing the exact same technologies used to handle that switch with the current one from x86 to ARM.
Absolutely spot on Chris. RISC-V is the most exciting thing to happen in computing for decades. As someone who started getting interested in computers in the 70's and grew up during the personal computer boom of the 80's I have often felt that the field has become stale, samey and uninteresting. Personal computing has become obsessed with how many FPS can be reached in the latest games (and how much the GPU's cost to do it ! 😲) while supercomputing has become obsessed with how many x86 cores can be squeezed into a 19" rack. RISC-V has the very real potential to be a total game-changer. People who focus on the current state of RISC-V development are myopic and don't understand how Intel grew from a small company producing the 4004 into the behemoth it is is today. Sure, RISC-V isn't ready for prime time yet but it is advancing rapidly and this will only be accelerated by a geopolitical environment where people don't want to be at the mercy of American IP or Chinese fabrication plants, including the danger of China taking control of the Taiwanese fabs. The other major, and equally important factor is cost - companies pay huge sums to Intel/AMD and ARM to use their designs and it is a commercial no-brainer if you can avoid those fees by using an open source ISA even if you have to invest money up front for development. Finally, we are back in exciting times in the world of computing the like of which we haven't seen since the early 90's. 👍😁
RISC-V represents the pinnacle of general compute, don't forget who created it. It is being allowed to exist because the future is in neural nets and massively parallel systems. It's good for us all...
Very clear breakdown of the _general_ state of Risk-V in relation to legacy (aka mainstream) processor ISA's. However, I'm left with more questions than answers in the "function" an ISA fulfills and how it is integrated with proprietary extensions like GPU's, PCI, etc., and where the compatibility or ownership lines are drawn between proprietary and open implementations, between "chiplets" and cores, etc. Pointers to any material that might address these kinds of questions would be greatly appreciated, and perhaps might warrant a video of your own.
That's the problem. RISC-V is only an ISA, not a system specification, so the reality of implementing it in a real system is a mess. Code written for one processor will almost certainly not work on another. All the major RISC-V vendors use a variety of proprietary instructions to overcome the limitations of the ISA, especially with regards to performance, which isn't very good.
the RISC-V is actually quite entertaining and seeing it become more mainstream after a while is nice i have a feeling it may become able to also run x86 code as well on it and be more capable as a replacement desktop PC board while not being x86 powered
Wait, mATX?! Ohhh, I am very intrigued! There are some console-looking mATX cases and older HTCP ones that would be an amazing enclosure for those. Absolutely intrigued in this!
There is also one thing that happened that shows a lot good for RISC-V - MVidia failing to acquire ARM. This shown that private closed IP is inherent danger that your competitor will try to just buy it for themselves. No such risk with RISC-V.
Apple showed with M1 that faster and lower power chips are possible with ISA's of fixed length instructions. Intel and AMD should plan to transition to Risc-V and start to make x86 chips with Risc-V mode. Probably this will be the next and the last ISA transition after 32 bit and 64 bit x86 transitions. Intel could not manage to change inefficient x86 ISA to Itanium, but this time success is sure because transistor sizes are now small enough to put two ISA's into one chip.
Almost all modern RISC designs use variable length instructions. ARM, PowerPC, MIPS, and SuperH have done it for a long time. The only thing that really differentiates RISC from CISC is whether you can access AND compute information in a single instruction. In almost all other respects, including addressing modes and SIMD, modern RISC processors do a lot of things the CISC way.
@@johndododoe1411 If you mean that Risc-V also have a 16-bit instruction mode like ARM Thumb, you are right. But the main problem with x86 is that instruction lengths vary greatly and instruction boundaries cannot be easily found and because of that converting instructions to microops cannot be done in a simple and efficient way. This limits number of translation units and prevents further speedup in x86 ISA.
@@johndododoe1411 you recall right, but if you inspect the instruction set throughly most if not all the instructions are 32 bit, and 16 bit if compressed. longer instructions are also supported for future use to be flexible.
It is going to be very interesting to see if RISC-V can reduce the stranglehold x86_64 has on the industry. ARM has made significant inroads into the landscape with its capabilities and low power comsumption. With its open architecture, I feel RISC-V can have accelerated development with more eyes on the prize. Stagnation is never good for any industry so something needs to come along and keep moving it forward. Is RISC-V it? Time will tell. Stay well all!
I don't think RISC-V needs to beat x86_64, the processor so small and energy efficient it can be used in battery powered apps and lower power applications where heat is a problem. It is ideal for compact controllers for networking, disk drives, SSD drives, fan-less media controllers for audio/video applications where fan noise is objectionable.
Interesting stuff, a glimpse into the future. However, I remember in 1992-ish DEC Alpha was designed as a RISC processor for Unix. Might be apples and oranges, I’ve lost a few memory cells along the way. Good episode, thanks
to put it bluntly riscV looks hornier than Austin Powers at the all star invitational sorority house Christmas party - the overall global mkt is obviously hungry for it and the pace of development is accelerating - hopefully more players will jump into the riscV hot tub time machine and spur on more development and adoption - the cluster config looks particularly shagadelic if I do say so myself - good content! #self actualization #self awareness #agi building blocks
@@d.barnette2687 tom's hw has a recent article that goes into great depth on risc-V - well worth a look - youtube does not like links #balderdash #poppycock #joseph conrad #art conan doyle #alistar crowley #jim keller
I'm pretty bullish about RISC-V. Apple's M1 showed a 8 way issue out of order ARM64 can be competitive with Intel chips but because of the way ARM is handling licensing it is hard for any other ARM licensee to build a comparable chip. Qualcomm bought Nuvia and ARM sued them. Now with RISC-V this can't happen. Anyone can build a 8 way RISC-V chip and Ventana and Tenstorrent both have. We're getting closer to be able to buy a RISC-V laptop running Linux with comparable performance to Apple's MacOS Apple Silicon machines.
Also, the likes of CERN and other building experiments on a large scale with, prospectively, a very long lifetime, adopting a RISC-V solutions reduces their risk of vendor lock-in and few replacement options in the future, should a particular vendor halt production.
Thanks for the update Chris, always great to know that a free and open standard is progressing nicely! I also agree and think it's a very important development not only as a competing platform, but also as an alternative for proprietary architectures.... really not a fan of countries being able to leverage proprietary architectures as trade war fodder, no matter how justified it may be. It's not so much about China, Russia and other sanctioned nations, it's more about commodity weaponization. Computers, smartphones and whatnot are such a fundamental part of any modern society these days that I think we should have open platforms and standards that can be used regardless of politics, no country or economic block having power to control access to it.
China and Russia definitely will use their technologies as a way of avoiding sanctions in order to continue their war and total disrespect to human rights and humanity overall.
There really is no choice. x86 licenses are limited and ARM is going crazy with restrictions so it’s either innovating something new or get stuck with duopoly / monopoly
Discussions like this would be much easier if we had terms that distinguished clearly between "free as in free speech and free as in free beer". Apologies for resorting to a cliche", but it is well understood. It wouldn'tbe surprising to see Western Digital gradually back into the server market with RISC-V. They have development experience, all the necessary hardware skills to built boards, and almost certainly the market contacts and credibility to sell them. Networking gear might be their first bridgehead.
I could see a 'WiFi File Server' for running backups for all PC's, tablets, phones in your home. That would be similar to smart printers with 'WiFi Print Server' built in. If they used a Linux File Server program it would be easy for user to maintain and provide for 'off site' backup as well.
As for the future of RISC-V, I think it's also about information battles. Because those who invest in one technology or make money from it spread rumors to stop the development of competition. Those who buy are guided by opinions, and it is buyers and their choice that ultimately make ARM, x86 or RISC-V more popular. ISA is not important, but peripherals, their speed, memory speed, parameters and energy efficiency are.
I have the HiFive Unmatched developer board which is really cool though a bit anemic and yes software support needs a lot of work including porting web browser engines to be viable on end user desktop. I am sure it will happen in due course and I look forward to new RISC-V hardware coming to market, especially the new Intel/Sifive developer board.
The problem is going to come from the OS market share side of things. In the desktop/laptop OS market space, Windows, as of Feb-2023, still commands >70%, though it is very slowly declining, with OSX now being >16% for the same period. In the tablet space, iPadOS still has >51% with Android very very slowly climbing, currently at >48%. In the phone space it is a different story, Android has >72% with iOS at ~27%. So Google's commitment to Android and RISC-V going forward is a good one, I can definitely see RISC-V making in-roads in the mobile market. But unless MS decides to start properly supporting RISC architectures, and not just making a deal with Qualcomm for ARM support, I don't see RISC-V making much of any inroads outside of the linux community, it would require MS and Apple support, Apple already has RISC support, but it is with ARM, I don't really see them switching so soon after switching to ARM. And in the tablet space, same problem, Apple would need to switch to RISC-V over ARM-based SoC's, and I just don't see that happening for at least another 5yrs minimum. So RISC-V still has a way to go, I can definitely see them heading into the datacentre/server segment, especially if nVidia make the move from ARM to RISC-V, but I put the critical computer adoption of RISC-V at around 2027 at a minimum, possibly even 2030.
I would say RiscV will become a major platform eventually but that is probably around a decade away. Having said that if RiscV Socs can get to a point where they can leverage their licence free price advantage I foresee RiscV gaining traction quickly especially in the embedded space.
Many of us are old enough to remember “closed” network protocols, such as NetBEUI (Microsoft), Token Ring (IBM) and AppleTalk (Apple, obviously). All have disappear and TCP/IP, the open protocol is now dominant everywhere. There is no reason why an open ISA won’t dominate in the future.
As an advocate for FOSS Software, I cant tell you how excited I am for RiscV 😍
Same!
Yes and remember as well WD also uses another older technology on the silicon as well, in there being an embedded 6502 processor, with 64k of ROM and RAM, which is used to bootstrap the main processor, feeding in the configuration file and doing housekeeping, as the core is now royalty free to use, and there is a lot of tools to develop for it, and it is both also RISC, and also incredibly small as well, fitting well in the RISC architecture. So small you can fit it into a ultra cheap processor sold as a toy.
The only thing that could be the fly in the ointment is that 486 and ARM have a standard that is controlled and understood. Risc-V is already split into two closed and open. Who will control compatibility?
All of us my friend 🎉
@@tonysheerness2427 RISC-V Foundation will do that ... btw, that (standardization, research, promotion, providing resources and training) is their purpose and right to exist:)
Don't forget that RISC-V itself IS the base layer providing compatibility. Anything else YOU invent and introduce to the platform (and that freely, which isn't a thing with X86 & ARM) is surplus, a gift or a relief. How could you possibly see that as something bad (like you asking in that direction)? With more, free and open diversity there will come opportunities! No offense or accusation: It is only ones OWN confusion and fears (based on unfamiliarity with the topic?) that gives this unfounded feeling of negative consequences. (This problem exists not only with processor-ISAs ... sadly).
I am looking forward to more variety in the processor market. It was an interesting time in the early 90s with Sun Sparc, Intel, MIPS, Motorola 680x0, PowerPC and Dec Alpha. It also seems we have much more flexibility today with Linux in that it is easily ported.
Great point!
Yes, this! BTW, you forgot HP PA-RISC and Itainium. Except for "Itanic", I have used all of them.
@@cdl0 Elbrus CPU...
You say that, but, just look at the Snap vs flatpak vs etc... situation. The open source community is already at a pretty maxed capacity just doing things for different linux flavors on the SAME architecture. How will adding 10-15 more CPUs with different and non-standardized instruction sets benefit anyone outside of those with the money to pay people to make software for their specific platform? And yes, risc-v has stuff in theory to make things have basic minimums to prevent fragmentation but those have not produced the desired results, its uniform only on the most idealistically written marketing webpage.
@@TheRus13 Oh yes, a super-rare one, even more exotic than the Itanium! I never got my hands on one of these, as well. Another legend lost in the mists of time was the Transputer. I have seen these demonstrated, but never used one.
This explains RISC V in simple terms, very easy to understand as always the case for this channel. Thanks.
You're very welcome!
Yes, Kamol, I agree that this was an excellently done video, and I appreciate it very much. I especially like that it's being put out relatively toward the beginning of 2023, so that we have some kind of high-level overview of what RISC-V developments we might anticipate this year. I agree with others sentiments that this sort-of feels like another "birth era" in the computer industry (or perhaps "rebirth" would be a better adjective). It kind-of has the warm-fuzzy feelings somewhat similar to the historical mid-70s feel of the hobbyist S-100 bus market in which literally thousands of hobbyists participated in some small way or another in the road along which the MITS Altair 8800 and IMSAI 8080 (and some 6502 and Motorola 680x0 architectures) gradually morphed into the goal that some of us had at the time, namely a "personal computer" in every home. We weren't so prescient as to anticipate a "personal computer" in every pocket and in every car dashboard. The winners of that first round of personal-computer development were arguably those companies whose business-management acuity was greatest (and some would argue those who were just the darn best at turning the business idea of the personal computer into a profit-producing monopoly) such as the Bill Gates and Steve Jobs visionaries of the world.
A side effect of the topsy-turvy growth of the industry is that the instruction set architecture for Intel/AMD x86-64, although powerful, is just a horrible messy nightmare, such that we should probably have special custom shrinks to provide psychiatrist help to those poor slobs who are still stuck writing x86 code at the assembler level. ARM came along later, so was a bit less terrible than x86. We see the current benefits in Apple M2 chips being able to accomplish the same amount of work at power levels much lower than equivalent x86-64 CPUs (although the $ cost might still be more expensive due to Apple's pricing philosophy). But time and time again it has been proven that for doing equivalent tasks using much less power, RISC beats CISC (unless you can design a custome CISC chip for your particular mix of instructions - which nobody ever does). There's really only about half-a-dozen major categories of instructions (and cross that orthogonally with various data types and sizes-in-bits-or-bytes) in a standard CPU core, and now that we've kinda-sorta figured out multithreading more-or-less sufficiently, it's almost always more efficient chip-die-real-estate-wise to have a simpler, more-orthogonal instruction set (that is, more toward the RISC end of the spectrum) than to waste a lot of die space on interpretting and executing huge instructions that are rarely used in practice. A better approach these days to rare instructions is to have a very-fast function call mechanism to something that, by default, is implemented in software, but if needed is special cases can be implemented as add-ons to the core RISC ISA so as to run really fast in hardware This approach would also probably be best for GPU architectures. We went all the way around the horn and made tens of billions for Nvidia (and mere billions for AMD and Intel) in making discrete GPUs, only to find out that this sort of thing would be best incorporated as optional parts of a CPU chip that shares the same memory space as the rest of the CPU (such as in the AI engines now incorporated in Apple chips and some specific 7040-series AMD chips). I can see the industry possibly marching even more in this direction under the umbrella of RISC-V.
Updates in RISC - V field are surely needed.
As an open source enthusiast, RISC V getting better with time always feels enticing.
I agree.....the world is changing faster than ever after COVID. More of us are looking at availability of our future supply chains for equipment and software and FINALLY!!! We are starting to plan ahead. I think RISK-V is going to play a big part in the computing world.
Greetings from across the pond near Albuquerque, New Mexico, USA. As we say in Texas (my home state), "DANG, Prof. Barnatt -- that was a fantastic update on RISC-V. Somebody throw me a towel!" It's like eating three big steaks at once, and now I need time to digest it all. Don't know about others, but I'm slowly getting more and more excited about RISC-V, especially since quite a few government agencies and corporations are getting on board. I really want to get a RISC-V SBC, but my instincts tell me to wait a bit longer for a much better payoff, so I'll wait -- but not much longer!
Many thanks for this support -- most appreciated. :) As you say, RISC-V SBCs will go on improving, and rapidly. The barrier to their use right now is already software, not hardware . . . but it will get there, as there is a lot of community support and interest.
RISC V seems rather promising and I love general openness of the architecture.
@@new-lviv the most dystopian OS is Windows 11
Every kind of knowledge should be open and free for everybody! It's a shame that one has to pay for example for ISO- oder DIN-Definition-Documents or for learning materials that could be hosted and downloaded practically for free.
@@new-lviv Yes. This is a phenomenon also known as "freedom".
Freedom is always a bit messy, offering too many choices. Leading to inevitable fragmentation.
But, like, some might challenge that, well, that's kind of the point. That's what freedom is.
That this is the definition of freedom. To make your own choices. And for that choice to be a real choice, it needs to be a free and open choice - which necessitates a wide array of possibilities. And, with everyone making their own varying choices, this inevitably leads to fragmentation.
The underlying argument being that this is not a bug. It's a feature.
It's supposed to look like this.
@@thesenamesaretaken Everyone always says that about the current Windows OS. The entire community was in an uproar when Windows 10 came out, totally different to the positive sentiment today.
@@jimtekkit I can't speak for 10 because I never used it. What I can say is, having moved straight from 7 to 11, that there is a lot about it that makes me cringe, as if they deliberately looked for bad parts of the smartphone ecosystem and brought those to the desktop. If it weren't for work and education I would abandon windows entirely at this point.
Chris, I've been following your channel for years and your clear, concise manner has never failed to impress me. Thank you.
FPGA as RISC-V is possible as well guys. the cores are on opencores. If you already work with FPGA's, this could be interesting for you
Yeah, at my job we make makes SoCs for industrial controllers and sensors. We're looking to make our own eFPGAs for the signal processing, ideally on the same chip as the sensor.
There's $15 FPGA dev boards that can run a RISC-V soft core at 100 MHz - granted it's the stripped down embedded processor, but more than enough to replace most microcontrollers.
Guys .. look what we saw found out today, a mobile RISC-V platform based on FPGA. look for Mr Iot tech
Nice it's Sunday finally Love watching your stuff because you work hard
Note that May 2011 "RISC-V" is very different from and incompatible with 2015's RISC-V 2.0. What was published in 2015 (RV{32,64}IMAFDC) is still compatible with RISC-V today and forever into the future -- just more features are being added on with time, but the core things will never change.
Another fantastic video! No one else explains computers like ExplainingComputers!
Great summary and insights.
This is another aspect of how "computing" has become a commodity, and requires global equalisation (so not owned, directed, or defined by any one entity or country).
Historically there hasn't been a problem with ARM. It's been very, very cheap to license and has not been limited.. For the most part if you're making chips the cost of ARM should be largely meaningless. Open source not necessary for anyone in the business and RISC-V would have died off.
But China is trying to get around trade sanctions. RISC-V is pretty much entirely about the very unequal entity of China. That's what this is about, not any high-mindedness.
Global trade balance is the way.
Well if you like at the internet public statistics 1/2 of all users are on phones. So when they get a new phone and it has RISC-V as long as everything they use works as normal barely anyone will care. The problem will be when you get to the server market as almost everything is made for x86. To my knowledge they will not change from what they use unless there is a good reason to change. Then you have the desktop market. As almost everything is made for x86 or x86_64 moving to RISC-V or even Microsoft trying to move to ARM is a problem as almost everything designed for desktop is made for x86.
@@kyleolson8977 So is RISC-V a threat to the US and NATO? As a Pole, Canadian and Brit, that would concern me very much. Could it lead to defeating the power of Western sanctions on bad actors?
An excellent update and some great insight Chris. Thank you! Also, nothing lasts forever, as there are always new entrants into the IT space, Remember when Commodore, Atari, Sinclair et al seemed untouchable?,
Thanks for support. And yes, I remember the Commodore/Atari/Sinclair days very well. Things do always move on.
@@ExplainingComputers looking back always makes me regret I am not a hoarder 😢😂
RISC-V is fascinating. I hope these kind of update videos continue to do well on your channel because I always appreciate and look forward to them. For example, I always look forward to your quantum computing updates. Looking forward to your next video!
Thanks Perry. Views "permitting", I hope to now post a RISC-V annual update each March, just as I have done a quantum computing update in August for many years now.
@@ExplainingComputers Yes, definitely views permitting. Also, permit me to say, I liked the visuals of you talking to the audience with computer and video tech stuff on both sides of you on the table. Impressive young Jedi!
Hey people, Chris is closing in on a million subs. Let’s push this spectacular channel through that number and way, way past it!
Thanks, appreciated. :)
done
This recognition would be greatly deserved!
Only 1 million? That is an outrage! This channel should have at least 1 BILLION viewers!!
@@Remigrator A channel generally have more viewers than subscribers. Remember that most popular channels tend to ask their viewers to subscribe because as they say: "60% of our viewers aren't subscribed". Most people just watch a new video when it gets recommended and don't subscribe at all.
I'm mostly interested the lowish power (W) embedded platform SBCs where size, low power, price, and support are more important than raw speed. The RPi filled that while they were available... so sad what has happened.
I think your interest matches that of most makers. I'm now planning a video that will try to bring together what has happened in the maker SBC space, why, and where we may go next. Stay tuned! :)
Wait, something happened to those little things?
@@builder396 well, kinda, the company raspberry pi foundation saw an opportunity to make loads of money and instead of selling to makers, learners and enthusiasts they have now prioritized selling them to big companies for automation (as its a perfect product for automation etc.)
Really good video, Christopher. Easy to understand explanations, well documented with links (we used to say "footnoted"). Ever since the early 1970's when I started building early computers using available microprocessors (Z80, 8008, M6800, CDP1802, etc.), I was told that RISC was "right around the corner". Well, here we are, and it appears we have finally found the corner...I think. Thank you for researching and documenting RISC progress. I am not sure I completely understand the advantages of RISC (other than the licensing issues), but I am confident you will teach me as we head down RISC highway. 😁
RISC has been a major technology for quite some time now, there are more ARM cores out in the wild than all other processors combines. RiscV is just a processor instruction set standard based on RISC that is open source meaning no licensing costs to those who wish to implement it in silicon. The disadvantage is that ARM provides core designs that can easily be integrated into SoC designs. With RiscV you are on your own.
The "R" in ARM stands for "RISC", by the way.
Originally, the "Acorn RISC Machine", as it was created by Acorn in the UK.
But then - in a joint venture with Apple (who'd used the ARM chip in their Newton product) and VLSI - they founded a new company for its further development, and as Apple and VLSI were also involved there, then the Acorn in the ARM name was substituted and, for the company, ARM stood for "Advanced RISC Machine".
These days, the acronym officially stands for nothing. It's just a name and is no longer considered to be an acronym for anything.
But, yeah, the ARM was born in the '80s in the Acorn Archimedes. I used one at school, when I was a kid.
(And, truth is, though modern x86 chips still present a CISC instruction set for compatibility's sake, it's really a RISC chip, running microcode, under the hood and has been for a long time now. It just presents a CISC instruction set to the outside world, for "backwards compatibility", but its internals are actually RISC.)
Quite an eye opener. I remember eeading about RISC in byte magazine during 90s
Very happy to see these recent developments all explained in such a clear way. Thx for posting.
Thanks for giving us a broader view of the path/s of development that RISC 5 is moving towards. You’re certainly correct in your assertion that chips will dominate national security priorities/concerns for all the technically advanced nations; in their forthcoming struggles for self-security and supremacy of market/s control.
Always prescient in your observations, much appreciated.
Thank you for your thoughtful and informative dissertation re the state of RISC-V technology in 2023. 👍
It's a refreshing change from the (mere) regurgitation of numbers and/or static comparisons between existing pieces of hardware that one might find elsewhere.
Anyone else think that the "cluster" platform at 10:30 seems pretty bloated like me? I like SBC clusters that maintain a compact size and don't cost a fortune just for the backplane PCB. And the horizontal RPi compute modules just create huge layouts.
Risk V seems to be moving extremely fast compared to how other ISA's did (and are).
I'm excited for the day we can launch an application and simply snap cores and accelerators together for a small batch of CPU's and/or MCU's, like we can today with multi-layer PCB's.
Thanks for your thoroughness and another well presented and detailed video, Chris!
I'm sold on RISC-V!
Not only is it open but the instruction set has a simple and elegant look to it.
It definitely lends itself to parallel processing.
I think you're spot on with your closing statement. It feels to me like RISC-V has hit critical mass now so it'll be big, the question is how big. My guess is that it'll eat into Arm more than x86 at first, that just feels like a natural target for it.
Appreciate the update on RISC-V. It seems to be evolving rapidly and feels a little like the early days of Linux adoption. Have a coffee on me! ;)
Thanks for your support, most appreciated. :)
...superb video again, chris...the technical in addition to the appraisal needs to consider!...
A new master class on the future of RISC V architecture. Thank you very much!
have a like from me for your avatar
The most important difference between RISC and CISC is that RISC can be implemented using mostly hard wired instruction decode and execution rather than make use of a micro code processor. This allows a higher throughput per clock cycle than a microcoded processor. Many CISC processors do make use of a fair amount of hard wired instruction decode and execution thanks to increased transistor counts. Still, the RISC style of hardware is easier to implement on a low power processor than CISC.
Well done for pointing this out. Thank you for saving me the trouble of making the same comment.
CISC only made sense in the early days of computing, when memory and storage where very expensive and highly limited in capacity, and power consumption was basically inconsequential. The emphasis was on making your compiled executables as small as possible. In today's computing world, those things are reversed.
@@johnhunt1725 CISC also makes sense if you are going to write your code in Assembler. Many CISC instruction sets are really like high level languages. As compilers evolved, it became easier to 'translate' high level language code into RISC instruction sets. I'd wager that very little ARM code is actually written in assembler (except for low level initialization routines), and that most ARM software is actually written in C, Ada, Python, or other high level languages.
@@johnhunt1725 Yes, this was the working hypothesis. When real RISC processors were released in the wild, it was found that real code density was very much better than feared, and barely worse than CISC. The reason is that RISC ISA's necessarily provide efficient, orthogonal machine codes for compilers.
@@KennethScharf 🤔Does anyone write anything for any platform in assembler anymore? I wouldn't be surprised if it's no longer a BS in CS degree requirement these days.
RISC V looks very promising indeed. Thanks for another great video Chris.
Greetings Steve. :)
Interesting video. Hope RISC-V will follow the same success story like Linux. It is always better to have more choices. One day it may become another interesting SBC like Raspberry Pi.
What success? 0.001% of the desktop market 🤣🤣🤣🤣🤣!
@@jimmihenry While it is a small percentage, it is growing. It's about 2.94%, slightly higher than Chrome OS. Up from 2.19% a year ago. Windows dropped about 4% during that same period.
@@rgbii2 I tired Linux.Linux Puppy for a older laptop, oh boy what a journey! Had to scratch the boot loader from another revision, i accidentally downloaded a Japanese version to get the grub, well it was 3 am spend hours on that build... Because i am stubborn i made it. I also installed Arch it was way smoother, but only on a virtual machine. Linux is not a suitable daily rig OS sadly. Not even Ubuntu that spy's on you like Billy G. (G like gangster 🤣)
@@jimmihenry Depends a bit on hardware and distribution. Some 22 years ago I had no problems at all installing Redhat to dual boot on an IBM T20, and it has gotten to be much simpler since then e.g. with Ubuntu. It's essentially automatic now, and much the same goes for PC's. One slightly nasty thing to note is that current installers on big distributions such as Ubuntu won't work on very old x86 CPU's; you need to find a distribution which supports old hardware.
As for daily use, the Linux ecosystem supports just about everything you are lilkely to do, and there are several ways to run Windows things if need be. Note that Linux will mount Windows filesystems, and packages such as Libre Office have good format conversion utilities. I have used Linux for 99% of everything I do since 1995. Distributions have included Slackware, Redhat, Distro Astro, Ubuntu and Ubuntu MATE (not forgetting Raspbian on the Pi), the choice is vast. In nearly thirty years I can remember paying for only one application, an Excel-like spreadsheet called Xess, and after 25 years the binary can still run on current Ubuntu (with a little hacking of the install script).
@@jimmihenry Hmm, I've been using Linux since around 1995.
Nowadays, I have it running on most of my machines and on my wife's laptop. My children also use Linux both at home and at work. I have supported Linux both on servers and desktops from over a decade, in addition to Linux-based PBX systems.
YMMV, as the Yanks say, but if you measure the success of Android which runs on top of a Linux kernel, you can hardly say that Linux has been a failure.
I would gently suggest that your own personal experience does not define the success of Linux.
A good development! I remember all the historic architectures like MOS Technology MC6502/6510 and the PDP-11 by DEC but what I really loved was the MC68000 of Motorola in my Amiga computer. It was amazing and I was really able to write everything in assembler what I could imagine. Just time was the limit.😊
Good review, I don't think I can pack my thoughts in a single comment but I'll try 😊
1. ISA itself is open, but as you mentioned it all boils down to IP related to manufacturing of the cores. For non-US countries it gives some freedom out of embargo etc, as long as they can create and manufacture effective core
2. Even with free ISA I'm sure there are lot of patents that can create a mess during manufacturing of the CPU
3. With AMD, NVidia and other fabless companies they still risk a lot being tied to TSMC
4. I think that success in server computing will depend if AWS, Azure or Alibaba will be able to deliver a cost effective solution, with the last one having most incentive in being US independent
5. Desktop computer is another beast. On one hand we only need web browser today, on the other Windows is still strong especially in corporate computing and as long as MS will not cut ties with Qualcomm we are not going to get anywhere
6. EU has its own issue. Having only STM and being "green" by manufacturing CPUs in Asia now we need to acknowledge that is not as green and still start doing it within EU borders. A pill quite hard to swallow
Great post. An agreed! In particular, a very good point on the server space / cloud providers. And on the EU . . .
Server != cloud != big 5 cloud providers. Adding another architecture will be easy for the big 5 than for pourer players.
Europe also has NXP. Fabless production is the great enabler for new designs, TSMC monopoly is a problem compared to back when chips like 6502 could use an ecosystem of competing fabs that didn't own particular gate and transistor designs elements .
On the desktop side of things, the rise of mini-PCs says everything. The modular tower is on the way out, as you've already discussed. I also hope RISC-V leads to a significant de-bloating of operating systems and software. Using web browsers everywhere for everything has led to a significant degredation of our standards for software, and a phenomenal waste of processor cycles (and thus, energy and time).
Agreed.
I just worry about what this means for the more enthusiast and pro-sumer markets, where being able to build a machine that is exactly what you want in terms of specs and hardware is dominant. I just recently built my first server, and I don't think I would be able to do that if everything is SOCs and MiniPCs.
@@K9TheFirst1
Socketed SOCs with support for PCIE expansion is technically possible. Run the power efficient graphics on the soc, and when the extra omph is needed, the external GPU spins up. RAM might still be as it is, with SOC ram acting closer to cache than RAM.
I have to strongly disagree. The modular Midi Tower has two main advantages over SOCs and MiniPCs.
1. It can be used to cool off enormous amounts of energy without the computer becoming too loud. This cannot be done with an SOC and an SOC would always be significantly slower than such a cooled high-end computer in a midi tower.
2. You can upgrade the Midi Tower super cheap. I only have to replace the motherboard, the CPU and the RAM, I can mostly continue to use the rest. I've been doing it this way for many years now and it's the most cost-effective solution to have a lot of power and a sufficiently up-to-date computer at the same time.
The SoC serves niches. As a secondary computer e.g. It's okay to watch Netflix, but a SoC will never displace my main computer in the Midi Tower. This is not possible just because of point 1.
It's only the Instruction Set that is open-source. Any real chip design to implement it is completely proprietary, and needs to be completely proven separately. And as companies add new instruction-set groups to try to overcome the abysmal performance of current RISC-V chips, it means software that uses these extensions will only run on specific sub-groups of RISC-V processors. Not sure how this is better than ARM designs, where both ISA and actual chip designs can be licensed for less than a from-scratch design of a RISC-V chip.
You seem to have missed the critical point about global politics.
@@ExplainingComputers Yes, I understood that. However, the Chinese are blocked from any low-nanometer equipment now and will have to continue with the older equipment making slower chips. I doubt that ASML will sell them any, considering that any advanced chips will go straight to the PLA military buildup, and possibly transferred to Russia under the table.
Excellent updates on the RISC-V world! Thanks for all of your research for the update and overview of the architecture's history. I love how clearly you always present information and make it accessible to wide audiences (including the geekier types :P). Thank you.
Well summarised. I have recently built a Ryzen 5 5600g based matx desktop PC. I fervently hope that Open Source, RISC-V succeeds. Then, if I ever build another PC, it will likely be based on RISC-V which looks to have great potential. Thank You.
Odds are good you won't be able to build a computer in the sense you are thinking of with risc-v anymore than you can just go out and buy an ARM cpu and then go buy a motherboard you like with it currently. It will be like the M1/M2/etc.. Macs. You will just be buying the system, not the parts and all the pros and cons that brings.
Excellent update. I look forward to following what happens to RISC-V.
RISC-V is really impressive. Especially, it is less complicated family like ARM series or PIC series. I just select the correct support instruction set features and I can compile the software into RISC-V core.
Nice to see RISC-V gaining steam. Thanks for the video!
Thank you Chris for an interesting Sunday video, it's exciting & good to have healthy competition against X-86 & ARM (give them a bit of a kick). Risc-V will no doubt mature in a few years time & with some of the big tech companies behind it, it will spillover into end user devices whatever they may be!!
Thanks Allan, your support is appreciated. :)
Thanks Chris!
The view through your crystal ball is always entertaining (as well as thought provoking and insightful).
I enjoyed your expansion of view!
Great vid as always.
Awesome accompanying thoughts about the technical jump from Vision5 1 to the Vision5 2 👍
The fact that it's under open source licenses is a great plus for me. I'll keep my eye on this project, I hope it goes far
Peter another great evening spent watch new and exciting video again love you approach to explaining computer easy to understand thanks Mike
Very thorough analysis and forecast of open source ISA through RISC-V
nice work 👍🏿
The adoption of RISC-V reminds me a lot of how the PIC microcontrollers basically wiped out the traditional CPU/RAM/EEPROM computer configurations in low cost applications. The ability for manufacturers to consolidate all those components (and PCB real estate) and save big money with a single-low cost chip is what completely changed that market. I don't think the question is whether RISC-V will change things, it's a question of what it will replace.
Looking at those press announcements, my (albeit perhaps optimistic) suspicions are that soon you'll have to do these bi-yearly, and then quarterly. Possibly before this year is out :)
The big advantage for x86 and ARM is that they have already done a lot of heavy lifting for decades to find optimisations. Whereas the advantage of RISC-V is also, ironically, that x86 and ARM have done a lot of the theory of heavy lifting to find optimisations - not so much in untransferable proprietary code, but in the failures, procedures and methodology, and in many cases those workflows can be directly applied and so streamline the catch-up process. ML optimisation will also be a big thing in that regard.
It's been a long road for x86 and ARM, but when you approach the limits of physics with little more to eek out of a single core without scalability issues, and all you're really doing is optimisation, then you can do little else but watch the underdog catch up.
So, the end of that long game, and maybe not that long now, is not whether x86 and ARM will ultimately be faster - by any useful margin, but whether they're seen as cost effective, given their licensing.
After all, in a double blind test, once the dust has settled on experimentation of recipes, can you _really_ taste a quantitative quality reduction from Kellogg's Corn Flakes to Supermarket X's own brand? Or is the only significant difference in your pocket?
Thanks for this. More regular updates may indeed be needed! :)
The real problem is that x86(x64) is designed for a different market than RISC-V. x86 has a stupidly complicated instruction format, but the instruction decoding process is a drop in the bucket compared to the hardware needed for high-performance computing, and x86 does that really well. If x86 didn't have such a deeply entrenched ecosystem, a "cleaned up" x86 instruction format could be developed that would absolutely destroy everything in the high-performance market.
RISC-V is reasonably simple, but it just can't compete at the high-end due to major compromises to satisfy the low-cost embedded market. Having read the RISC-V whitepapers, it's obvious the ISA was not designed for performance applications, and I doubt it will ever be competitive in that market, which is a shame.
RISC-V is generating excitement because it's cheap, and it's possible that will affect consumer prices by a penny or two. It'll take something else to dethrone the dominance of x86/ARM in the PC and server market. ARM will be around for a long time, as it's the certification and verification tools that really matter when you're developing a complete system, and RISC-V can't (and will never) hold a candle to that.
@@Waccoon Excellent points, Waccoon. Many I'd not fully considered. I think a lot of possibilities still lie in multicore RISC-V.
Tho this massively multicore space is GPU space more than CPU space, it'll still be interesting where edge [in both senses of extraneous and edge computing] cases lie. NVIDIA has stated replacing Falcon with RISC-V, and I think RISC-V does perhaps sit in this middle ground, somewhere between CPU and GPU, which, for ML TPU driven development, might be an interesting space. The Esperanto ET-SoC-1 being perhaps the biggest/fastest proposal in this space so far.
And while I certainly don't doubt your arguments and research here, I guess I'm just more optimistic about things we don't know yet :) In that the more these get pushed out to research markets, the more unexpected use cases/modifications will appear. Either way, it's going to be fun to watch, and will push all markets, that's the main thing :)
If there's one thing that a tech company loves and it's licence free intellectual property that ensures that they make more profit. I think RISC-V will do well once it gets up to speed and gets more adopters.
I always feel slightly smarter after watching your videos Chris. Cheers
Thanks for another update Chris - RISC-V seems to be forging ahead at a very quick pace!
Greetings Chris. :)
Thank you Chris for explaining RISC V so well.
A good and thorough review as usual! I think Google wanting RISC-V as tier 1 android hardware is good news for the prospects of RISC-V based SoCs having decent GPUs embedded, though sadly I suspect they'll still be proprietary GPU cores for a long while yet. Personally, while I'm not sold on the RISC-V ISA itself as an 'ideal' platform, it is fantastic that the industry is moving towards a more open ecosystem and making some dent in the x86 & arm hegemony. x86 (even with 64bit extensions) is a horribly archaic ISA with far too much legacy holding back any progress potential, and ARM is just far too proprietary. To complement RISC-V in the move towards more open ecosystems, there are two shifts in the industry I'd love to see. An open GPU core akin to RISC-V, and RapidIO being adopted and replacing PCI-E as the dominant / standard interconnect. RapidIO is an open standard, and superior to PCI-E in many ways, but its adoption is still relegated to niche and specialized applications. I can dream. :D
There is a huge hole in the market between the best desktop processors (M2 Ultra, i13900, 7950X) and servers. AMD used to fill it with ultra expensive Threadrippers. Intel used to sell the desktop Xeons, but both of those are gone now. I'd love to see RISCV fill that gap. 32 ultra fast cores with 4 or 8 DDR5 memory channels.
It will be a long time before that may happen. RISC-V is likely to be used in the embedded market, then probably servers. These are applications that generally use new code or code that can be recompiled. Mobile and desktop are more dependent on pre-installed software, so these are more difficult to transition.
Nervos Network and Risc V 🤝
Great survey of the tech frontier! Thanks for your views!
As always, plenty to think about. And it should be interesting to see what you'll be talking about this time in 2024.
I'm always apprehensive when big tech embrace free and open source anything. You just know they are up to something.
RISC-V is an open (ie free-to-license) ISA. It is not open source (as in open source software).
I don't see much changing in the personal computing space due to how prevalent the specific x86 and arm instruction sets are within programs without some generous compatibility layer stuff.
But for Embedded this could have some big impacts and i am gearing up to get to learning the intricacies of RISC-V as it is pretty clear these will become a common tool in the toolbox.
Apple has changed ISA in their desktop computers more than once. Both times they've used a combination of "fat binaries" containing machine code for both systems as well as emulation to keep software running. The overhead from emulation has also been used as an incentive to compile to the newer architecture. Given how much Apple likes to control their stack, they could very well be among the first to push RISC-V to desktop computing, at least if they didn't _just_ switch to ARM so recently.
The prior instance by the way was switching from PowerPC to x86, and they're reusing the exact same technologies used to handle that switch with the current one from x86 to ARM.
An excellent overview of the RISC-V landscape.
Absolutely spot on Chris. RISC-V is the most exciting thing to happen in computing for decades. As someone who started getting interested in computers in the 70's and grew up during the personal computer boom of the 80's I have often felt that the field has become stale, samey and uninteresting. Personal computing has become obsessed with how many FPS can be reached in the latest games (and how much the GPU's cost to do it ! 😲) while supercomputing has become obsessed with how many x86 cores can be squeezed into a 19" rack. RISC-V has the very real potential to be a total game-changer. People who focus on the current state of RISC-V development are myopic and don't understand how Intel grew from a small company producing the 4004 into the behemoth it is is today. Sure, RISC-V isn't ready for prime time yet but it is advancing rapidly and this will only be accelerated by a geopolitical environment where people don't want to be at the mercy of American IP or Chinese fabrication plants, including the danger of China taking control of the Taiwanese fabs. The other major, and equally important factor is cost - companies pay huge sums to Intel/AMD and ARM to use their designs and it is a commercial no-brainer if you can avoid those fees by using an open source ISA even if you have to invest money up front for development. Finally, we are back in exciting times in the world of computing the like of which we haven't seen since the early 90's. 👍😁
I think we are kindred spirits here. Great post! Thanks for sharing. :)
So exciting! Thank you for keeping us informed. I've very much enjoyed your Risc-V update.
RISC-V represents the pinnacle of general compute, don't forget who created it. It is being allowed to exist because the future is in neural nets and massively parallel systems. It's good for us all...
Very clear breakdown of the _general_ state of Risk-V in relation to legacy (aka mainstream) processor ISA's. However, I'm left with more questions than answers in the "function" an ISA fulfills and how it is integrated with proprietary extensions like GPU's, PCI, etc., and where the compatibility or ownership lines are drawn between proprietary and open implementations, between "chiplets" and cores, etc. Pointers to any material that might address these kinds of questions would be greatly appreciated, and perhaps might warrant a video of your own.
That's the problem. RISC-V is only an ISA, not a system specification, so the reality of implementing it in a real system is a mess. Code written for one processor will almost certainly not work on another. All the major RISC-V vendors use a variety of proprietary instructions to overcome the limitations of the ISA, especially with regards to performance, which isn't very good.
Exciting times indeed for RISC V, it's ties to academic research cannot be ignored and the advent of Ai opens the door to novel experimentation
Sounds ominous tbh 😂
the RISC-V is actually quite entertaining and seeing it become more mainstream after a while is nice i have a feeling it may become able to also run x86 code as well on it and be more capable as a replacement desktop PC board while not being x86 powered
Box64 is being ported to RISC-V by @ptitSeb123. He just posted a video playing SuperHexagon with Box64 on the VisionFive 2 RISC-V SBC.
Wait, mATX?! Ohhh, I am very intrigued! There are some console-looking mATX cases and older HTCP ones that would be an amazing enclosure for those. Absolutely intrigued in this!
There is also one thing that happened that shows a lot good for RISC-V - MVidia failing to acquire ARM. This shown that private closed IP is inherent danger that your competitor will try to just buy it for themselves. No such risk with RISC-V.
Excellent video Chris as you've been an early advocate of Risc-V so its exciting to see the adoption expand into SBCs as the MCUs are great! 👍
Apple showed with M1 that faster and lower power chips are possible with ISA's of fixed length instructions. Intel and AMD should plan to transition to Risc-V and start to make x86 chips with Risc-V mode. Probably this will be the next and the last ISA transition after 32 bit and 64 bit x86 transitions. Intel could not manage to change inefficient x86 ISA to Itanium, but this time success is sure because transistor sizes are now small enough to put two ISA's into one chip.
I don't think Risc-V is fixed length, but check the documentation.
Almost all modern RISC designs use variable length instructions. ARM, PowerPC, MIPS, and SuperH have done it for a long time.
The only thing that really differentiates RISC from CISC is whether you can access AND compute information in a single instruction. In almost all other respects, including addressing modes and SIMD, modern RISC processors do a lot of things the CISC way.
@@johndododoe1411 If you mean that Risc-V also have a 16-bit instruction mode like ARM Thumb, you are right.
But the main problem with x86 is that instruction lengths vary greatly and instruction boundaries cannot be easily found and because of that converting instructions to microops cannot be done in a simple and efficient way. This limits number of translation units and prevents further speedup in x86 ISA.
@@mehmetdemir-lf2vm As far as I recall, RISC-V has a very regular instruction length pattern, but not fixed length like ARM 32-bit.
@@johndododoe1411 you recall right, but if you inspect the instruction set throughly most if not all the instructions are 32 bit, and 16 bit if compressed. longer instructions are also supported for future use to be flexible.
NIce insights and updates Chris, thanks for your awesome sunday programming! :)
My pleasure!
It is going to be very interesting to see if RISC-V can reduce the stranglehold x86_64 has on the industry. ARM has made significant inroads into the landscape with its capabilities and low power comsumption. With its open architecture, I feel RISC-V can have accelerated development with more eyes on the prize. Stagnation is never good for any industry so something needs to come along and keep moving it forward. Is RISC-V it? Time will tell. Stay well all!
I don't think RISC-V needs to beat x86_64, the processor so small and energy efficient it can be used in battery powered apps and lower power applications where heat is a problem. It is ideal for compact controllers for networking, disk drives, SSD drives, fan-less media controllers for audio/video applications where fan noise is objectionable.
Mark Twain said: “Whiskey is for drinking; water is for fighting over.” Today chips are who rules the world? 😎 Thanks another great video.
Looking forward to emulating all my old nostalgic x86 stuff on a RISC system in several years :D
I love the emotional investment point
Sunday (late evening) Morning RISCy EC!
Great Video! Very informative and intersting!! Great job Chris!
Thanks Chris. Another great video, on a topic that I believe will be getting more and more exposure, probably from you too.
Interesting stuff, a glimpse into the future. However, I remember in 1992-ish DEC Alpha was designed as a RISC processor for Unix. Might be apples and oranges, I’ve lost a few memory cells along the way. Good episode, thanks
Greetings my friend.
Also, PowerPC, Sparc, PA-RISC, and MIPS. It was always envisioned that ARM would run Unix and Unix-like operating systems, as well.
@@cdl0 Anything can run UNIX as long as you have at least supervisor/user privileged modes and an MMU.
@@Waccoon Correct: ARM has included all the necessary modes from the outset.
Thanks so much for the excellent video and extra thanks for the LINKS! ❤
:)
Outstanding analysis, Chris, much appreciated, thanks!!
to put it bluntly riscV looks hornier than Austin Powers at the all star invitational sorority house Christmas party - the overall global mkt is obviously hungry for it and the pace of development is accelerating - hopefully more players will jump into the riscV hot tub time machine and spur on more development and adoption - the cluster config looks particularly shagadelic if I do say so myself - good content! #self actualization #self awareness #agi building blocks
:)
Something tells me you are English. Just guessing. :)
@@d.barnette2687 tom's hw has a recent article that goes into great depth on risc-V - well worth a look - youtube does not like links #balderdash #poppycock #joseph conrad #art conan doyle #alistar crowley #jim keller
While RISC may not be in servers as CPUs, it is used extensively in network hardware, usually in FPGA's for network fabric management.
Very true.
I'm pretty bullish about RISC-V. Apple's M1 showed a 8 way issue out of order ARM64 can be competitive with Intel chips but because of the way ARM is handling licensing it is hard for any other ARM licensee to build a comparable chip. Qualcomm bought Nuvia and ARM sued them. Now with RISC-V this can't happen. Anyone can build a 8 way RISC-V chip and Ventana and Tenstorrent both have. We're getting closer to be able to buy a RISC-V laptop running Linux with comparable performance to Apple's MacOS Apple Silicon machines.
RISC-V will be in the mainstream in ten years just like Apple ARM silicone ten years ago.
Also, the likes of CERN and other building experiments on a large scale with, prospectively, a very long lifetime, adopting a RISC-V solutions reduces their risk of vendor lock-in and few replacement options in the future, should a particular vendor halt production.
Well thought out, professionally presented and extremely interesting.
Thanks for the update Chris, always great to know that a free and open standard is progressing nicely!
I also agree and think it's a very important development not only as a competing platform, but also as an alternative for proprietary architectures.... really not a fan of countries being able to leverage proprietary architectures as trade war fodder, no matter how justified it may be. It's not so much about China, Russia and other sanctioned nations, it's more about commodity weaponization.
Computers, smartphones and whatnot are such a fundamental part of any modern society these days that I think we should have open platforms and standards that can be used regardless of politics, no country or economic block having power to control access to it.
China and Russia definitely will use their technologies as a way of avoiding sanctions in order to continue their war and total disrespect to human rights and humanity overall.
There really is no choice. x86 licenses are limited and ARM is going crazy with restrictions so it’s either innovating something new or get stuck with duopoly / monopoly
Even as an April Fool’s video I wish you would teach us how to install and play Call of Duty
Nah, better idea: explaining Minecraft and how to survive the first night in Survival Mode.
Discussions like this would be much easier if we had terms that distinguished clearly between "free as in free speech and free as in free beer". Apologies for resorting to a cliche", but it is well understood.
It wouldn'tbe surprising to see Western Digital gradually back into the server market with RISC-V. They have development experience, all the necessary hardware skills to built boards, and almost certainly the market contacts and credibility to sell them. Networking gear might be their first bridgehead.
I could see a 'WiFi File Server' for running backups for all PC's, tablets, phones in your home. That would be similar to smart printers with 'WiFi Print Server' built in. If they used a Linux File Server program it would be easy for user to maintain and provide for 'off site' backup as well.
As for the future of RISC-V, I think it's also about information battles. Because those who invest in one technology or make money from it spread rumors to stop the development of competition. Those who buy are guided by opinions, and it is buyers and their choice that ultimately make ARM, x86 or RISC-V more popular. ISA is not important, but peripherals, their speed, memory speed, parameters and energy efficiency are.
Nice overview. RIVOS also looks interesting.
Thank you for your effort keeping tap on RISK-V tech
Exciting! In a sense, RISC-V is delivering on the decades-old promise of RISC, and the liberating factor is that it's open.
I have the HiFive Unmatched developer board which is really cool though a bit anemic and yes software support needs a lot of work including porting web browser engines to be viable on end user desktop. I am sure it will happen in due course and I look forward to new RISC-V hardware coming to market, especially the new Intel/Sifive developer board.
We need more options like we had in the late 1980’s / 1990’s when we had x86, m68k, mips, parisc, power…….
The problem is going to come from the OS market share side of things.
In the desktop/laptop OS market space, Windows, as of Feb-2023, still commands >70%, though it is very slowly declining, with OSX now being >16% for the same period.
In the tablet space, iPadOS still has >51% with Android very very slowly climbing, currently at >48%.
In the phone space it is a different story, Android has >72% with iOS at ~27%.
So Google's commitment to Android and RISC-V going forward is a good one, I can definitely see RISC-V making in-roads in the mobile market.
But unless MS decides to start properly supporting RISC architectures, and not just making a deal with Qualcomm for ARM support, I don't see RISC-V making much of any inroads outside of the linux community, it would require MS and Apple support, Apple already has RISC support, but it is with ARM, I don't really see them switching so soon after switching to ARM.
And in the tablet space, same problem, Apple would need to switch to RISC-V over ARM-based SoC's, and I just don't see that happening for at least another 5yrs minimum.
So RISC-V still has a way to go, I can definitely see them heading into the datacentre/server segment, especially if nVidia make the move from ARM to RISC-V, but I put the critical computer adoption of RISC-V at around 2027 at a minimum, possibly even 2030.
I would say RiscV will become a major platform eventually but that is probably around a decade away. Having said that if RiscV Socs can get to a point where they can leverage their licence free price advantage I foresee RiscV gaining traction quickly especially in the embedded space.