Understanding 2+n+2 Stackups in HDI Design

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  • Опубліковано 15 січ 2025

КОМЕНТАРІ • 5

  • @miladdalim1
    @miladdalim1 Місяць тому

    great tutorials, I enjoy watching your videos

  • @jacobfaseler5311
    @jacobfaseler5311 Рік тому +2

    The description of intermittent failures around 6:30 harkens to that period of time when people were commonly trying to reflow GPU’s in their oven. Most thought the solder joints failed under thermal load, but others (particularly Rossman) suggested it was more likely PCB’s failing.
    Maybe stacked micro vias were the root cause?

    • @Zachariah-Peterson
      @Zachariah-Peterson Рік тому

      Interesting, I didn't know anyone was doing that with GPUs. I can't say for sure if they are related though.

  • @annacersongor8553
    @annacersongor8553 2 роки тому +1

    Hi sir, firstly thanks for sharing. Can we soon see design of RF systems and pcb antennae ?

  • @mariostrano6277
    @mariostrano6277 2 роки тому

    Hey Zach. Could you please do a video that covers "The Wiring Factor Process" described in IPC-2226?