Dataflow level Verilog Code of 4-to-1 Multiplexer/Mux and Testbench simulation in ModelSim

[@shivanshusoni197]

Very useful video in VLSI domain .....keep it up sir ...🙂❤

[@ElectroDeCODE]

Thanks

[@SnowMan-fn3pd]

For the (I) inputs are they a single bit or is each a four bit input. I've seen a design online where they considered each input is 4-bits.

[@xuanlee9216]

how to set my value to 1'b1, I can only set it to 0 or 1

[@tranthanhtruong4205]

thanks !!

[@deepakkumaryadav6009]

sir is code in agar ham for loop use kaise kaiege .

[@__moodie_foodie_7785]

Write VHDL code of 4x1 Multiplexer using if-else.

[@engrx535]

Good video.

[@ElectroDeCODE]

Thanks

[@amitkhedkar7832]

Thanks

[@ElectroDeCODE]

Thanks for the support

[@farukeomar4354]

Bl saound ato kom kno

[@thiagomedina1873]

Can you speak in English, please? :/

[@ElectroDeCODE]

Dear friend, soon. we will upload this video in English. Thanks for your suggestions.

[@rgfusfkhfriuwey8w]

Do you have a planned release date for the English version?

[@uguook]

@@rgfusfkhfriuwey8w its released now