Verilog Code for AND Gate, NOT Gate - With Test Benches - iverilog

[@veereshkuruva2553]

Good explanation sir,Nice work go.on

[@ShriramVasudevan]

Thanks and glad you liked it

[@cheppanu_brother]

thank you sir you require a masters in explanation it helped me aaa lott

[@nethravathy631]

Thanks a lot for your explanation sir

[@kientrung-io4jt]

you save my life, sir

[@ShriramVasudevan]

Is it. :) thanks. Subscribe to channel

[@kientrung-io4jt]

@@ShriramVasudevan can i ask you one question, 12:10 i see that almost people use UUT in testbench but you change to my_gate, any diffirent between that

[@ShriramVasudevan]

Nothing bro. Its an approach

[@sinikishan1408]

Detailed and simplified sir

[@ravivarma3864]

can u please make a basics of Development of video compression using TI’s DaVinci board along with its FPGA realization system

[@ShriramVasudevan]

I shall check this

[@honeymalhotra525]

Hello Sir, Very well explained , this coding is done in dataflow modelling style ?

[@ShriramVasudevan]

Yes

[@virasarnath03]

Sir from where to start basic
I joined VLSI in iit kgp this month for mtech

[@ShriramVasudevan]

Let me check and get back to you

[@SaadAli-ih9vq]

Sir can you upload a video in which you set a enviroment variable system???

[@mohammadhosein77]

Do more verilog videos, I appreciate your work

[@ShriramVasudevan]

Thanks brother

[@prakashdasari3990]

Anna mobile use chese verilog software cheppava

[@SaadAli-ih9vq]

When i do it it give this error
And.v : no such file or directory
Plz sir explain it

[@ShriramVasudevan]

You have not saved the file properly with .v extension or you have not mentioned the location right..

[@SaadAli-ih9vq]

Sir i saved file in bin like and.v & and_tb.v

[@SaadAli-ih9vq]

And where i mentioned location

[@venkateshaleti8267]

good explanation s

[@ShriramVasudevan]

Thanks

[@manikantareddy6359]

sir can u explain 8 bit alu code using verilog

[@ShriramVasudevan]

Will see when i can do it

[@oldcoder9000]

Good video

[@ShriramVasudevan]

Glad you enjoyed

[@diveshkosuri5594]

Efficient lecture

[@ShriramVasudevan]

Thank you