CMOS logic gate - 4-input function

[@appuvikki8290]

for p mos (.) operation is parallel ,but you have written it series??

[@B2k9440]

Correct

[@AmitKumarSahoo]

For Y_N=¯B (A+CD), you took the output (out) from VDD
For Y_P= ¯(¯B (A+CD) ), you took the output (out) from VSS.
Is it the same?
I mean - is to be interpreted as if the output of Y_N (which is the opposite of Y_P) - to be taken from the opposite side??

[@telsaabi9865]

Thank you Professor

[@inayano2305]

How do i know if i will use pmos or nmos?

[@RobertoPerez-ig3fz]

pmos is used purely for the top half of your circuit, above the input, and cmos is used purely for the bottom half of your circuit

[@teametf2532]

pmos is pull-up, nmos is pull-down.
Follow AOI rule, it will be easy....

[@austume6171]

Thank you so much

[@unknownpainttv3846]

Well explained thanks

[@anuraagsaxena7942]

Thank you sir

[@gouledawad2377]

Thank you!

[@salehakhatoon4162]

Tq so much sir

[@oguzhanege484]

thank you