The timestamps for the different topics covered in the video: 0:13 Why Active Clamper Circuit is used? 2:30 Analysis of Active Clamper Circuit (Clamper Circuit using Op-amp_ 10:00 Analysis of Active Clamper Circuit with Biasing Voltage
*I am new to clampers,* but I understand it as clamping the DC voltage of the input signal to a fixed voltage regardless of how the input signal's DC content may shift up or down in magnitude. *Using the characteristics of the op-amp which will always try to make the - and + voltage equal.*
At time 3T/4 input signal is in negative half cycle that means input will be negative hence capacitor should have (-12+5)v =-7v but how did you take +12v
As I showed in the equivalent circuit, it will get added with the 5V biasing voltage. So, the capacitor will charge upto 12 + 5 V. It will charge in the anticlockwise direction. that means the right plate of the capacitor will be positive.
@@ALLABOUTELECTRONICS sir please make more vedios in network theory .Make vedios on problem solving then we could master analytical part and theory part
I think I should have mentioned the polarity of Vc to avoid this confusion. Here, the polarity of Vc is the opposite of what you are assuming. (Right side of the capacitor is positive and left side negative). Just look at 6:49.
It is used to prevent the possible damage of the op-amp from the capacitor discharge. Ideally, the op-amp terminals are not drawing any current. Practically they are drawing very small amount of current. But the current surge during the capacitor discharge can damage the op-amp. A few kilo-ohm resistor (typically 10 k resistor) would do the job. I hope it will clear your doubt.
@@ALLABOUTELECTRONICS thanks clear answer..i have anither question please reply to this In op amp KCL analysis strongly maintain v+=v- then we are told that differenece between v+ and v- what is amplified??? Little bit confusing 🤔🤔🤔
@@rukshanfdoable See in reality there is a difference between V+ and V-. But it is in uV. And since the gain of the op-amp is typically 10^5 or 10^6, we get the amplified output which is in V. But for analysis perspective with negative feedback, since this difference is in uV , we can assume that both are at the same potential. I have already explained that in the inverting op-amp video. You may go through that video for more info.
@@ALLABOUTELECTRONICS also one last question..ifwe consider typical differential amplifier using bjt(dual input single output) how one input becomes let say Vs the other input also become Vs??? Can u explain the internal circuit behaviour??? In another video
The timestamps for the different topics covered in the video:
0:13 Why Active Clamper Circuit is used?
2:30 Analysis of Active Clamper Circuit (Clamper Circuit using Op-amp_
10:00 Analysis of Active Clamper Circuit with Biasing Voltage
Op-amp explanation by ALL ABOUT ELECTRONICS is best ever than anyone else 👌🏼👌🏼
*I am new to clampers,* but I understand it as clamping the DC voltage of the input signal to a fixed voltage regardless of how the input signal's DC content may shift up or down in magnitude. *Using the characteristics of the op-amp which will always try to make the - and + voltage equal.*
awesome, you are a better teacher than my school teacher
All about electronics is the Best thing happened for ECE gate aspirants
This is the besttt explanation of the active clamper circuit!! Sir that was really reallyyyyyyy helpful!! Thanks you sooo muchhhhhh!!
SIr, Your videos are very much understandable. Please make videos on feedback amplifier, feedback topologies etc.
oh oh, I love this topic!!!!!! So excited!!!!
Well explained, nice explaination ever👍👍
Very interesting and well explained.it would be nice if you can build the actual circuit and show the effect on scope.
Excellent 👌
Thank u sir
Awesome❤
love you sir
Please make video on microprocessor interfacing circuit with peripheral devices, interrupt,memory
Sir, you are doing a good job. Please also make vedios for power electronics.
May I know sir, in the calculation of RC which R i should use
What is the purpose of resistor R1?
Nice video
From T/2 to 3T/4, if the capacitor have charge, shouldn't the op amp have differential output?
why didnt u considerd virtual grounded during positive half cycle?
@14:32 why o/p of op amp is 5V
well explained thank you, Im new to the electronics could you please tell what software you used for simulation of circuits?
Multisim
@@ALLABOUTELECTRONICS thank you
At time 3T/4 input signal is in negative half cycle that means input will be negative hence capacitor should have (-12+5)v =-7v but how did you take +12v
As I showed in the equivalent circuit, it will get added with the 5V biasing voltage. So, the capacitor will charge upto 12 + 5 V.
It will charge in the anticlockwise direction. that means the right plate of the capacitor will be positive.
@@ALLABOUTELECTRONICS sir please make more vedios in network theory .Make vedios on problem solving then we could master analytical part and theory part
Respected sir at 3:33 how we can get the equation for positive input V-=Vin +Vc.. By kvl it should get
Vin - Vc -V- =0...
I think I should have mentioned the polarity of Vc to avoid this confusion. Here, the polarity of Vc is the opposite of what you are assuming. (Right side of the capacitor is positive and left side negative). Just look at 6:49.
@@ALLABOUTELECTRONICS yes sir.. Thank u
How we come to know that at 3T/4 capacitor is fully charged?
At the end of the video, I have also provided the simulation result. Please check the video from 17:36 onwards.
Why virtual ground concept not applicable here? V- not equal to V+? Please help me anyone
Would you please tell me the exact timing in the video where you are referring? So, that I can explain you accordingly.
Virtual ground concept only applies to ideal condition
We can not apply virtual ground if , capacitor or inductor is used
What is the use of R1 if there is no volrage drop please answer
It is used to prevent the possible damage of the op-amp from the capacitor discharge. Ideally, the op-amp terminals are not drawing any current. Practically they are drawing very small amount of current. But the current surge during the capacitor discharge can damage the op-amp. A few kilo-ohm resistor (typically 10 k resistor) would do the job.
I hope it will clear your doubt.
@@ALLABOUTELECTRONICS thanks clear answer..i have anither question please reply to this
In op amp KCL analysis strongly maintain v+=v- then we are told that differenece between v+ and v- what is amplified??? Little bit confusing 🤔🤔🤔
@@rukshanfdoable See in reality there is a difference between V+ and V-. But it is in uV. And since the gain of the op-amp is typically 10^5 or 10^6, we get the amplified output which is in V. But for analysis perspective with negative feedback, since this difference is in uV , we can assume that both are at the same potential. I have already explained that in the inverting op-amp video. You may go through that video for more info.
@@ALLABOUTELECTRONICS is it same as in open loop condition?? I mean v+=v- same as open loop conditionn
@@ALLABOUTELECTRONICS also one last question..ifwe consider typical differential amplifier using bjt(dual input single output) how one input becomes let say Vs the other input also become Vs??? Can u explain the internal circuit behaviour??? In another video
The capacitor is ideal so it doesn't discharge. But for a real capacitor there will be discharge. So the it must drop in potential with cycles...