Understanding MOSFET datasheets: Safe Operating Area (SOA)

Learn more about TI's MOSFET portfolio
www.ti.com/power-management/m...
Learn about the Safe Operating Area and how it appears on a power
MOSFET datasheet
* What is the MOSFET Safe Operating Area (SOA)?
* Linear vs. Saturation Mode
* How is the SOA generated for TI MOSFETs?
For more information, read the blog "Understanding MOSFET datasheets Part 2- Safe Operating Area (SOA) graph"
e2e.ti.com/blogs_/b/powerhous...

[@agstechnicalsupport]

Thank you ! Good video explaining how safe operating area data is prepared and how to read & interpret them from datasheets.

[@selvakumarr6672]

Good explanation. Thanks

[@jamest.5001]

so what causes the fet to heat up faster. high current pulses. or a constant high current. I guess what I'm asking does the switching cause any added heat? and does the FET work more efficient heat wise under pulses or constant current. another informative easy to follow video. thanks

[@chuckjls]

I know why people refer to the MOSFET saturated region as the linear region. It is because the BJT linear region looks very similar to the MOSFET saturation region. The difference is significant even though the curves look the same and I think saturated is the better term. Mostly because BJTs are current-controlled and are linearly responsive to their base current, whereas MOSFETs are voltage controlled and are non-linearly related to their gate voltage.

[@johnaweiss]

Is this correct?
Saturation region: When the transistor is fully on, because its channel region is fully conductive.
Linear region: When the transistor is partially on, because its channel region is not fully conductive, such that the gate can continuously vary the amount of attenuation applied to current flow through its channel region.

[@dartplayer170]

I was taught the opposite. The linear region is named based on the load line having a nearly liner amplification. The saturation region is named because the amplifier circuit is saturated and can no longer provide the output necessary for linear amplification.

[@rogeronslow1498]

I would have been nice if you mentioned how many devices are tested at a particular set of conditioned to establish your limits. Is it 1, 10 or 100 devices?

[@eddiemolina657]

Sir how can we proctect irf3205 from being busted in a mini plasma arc circuit?

[@theoryandapplication7197]

thank you very much

[@easyamp123]

you said it correctly at 15:13

[@hiteshjangra81]

What should we have to use which act as a switch for power transferring 50V and 50Amp current at same time for continuous condition upto 4-5 hours?

[@user-kf9gz9he3i]

thanks for your excellent explanation, but I'm still confused: 1) the junction to case thermal resistance is specified by design? cannot be experimentally measured? 2) since SOA is based on fixed case temperature 25 degree, how to fix T_case at 25 degree and measure the thermal instability under DC condition? Looking forward to an answer. Thanks

[@dongolahmed]

would it be different if the mosfet is sof-switched? also, would the cooling system design affect the safe operating area of the mosfet?

[@snnwstt]

As for the cooling system, definitively. The datasheet is quite precise about which one is used, at least.

[@damirdze]

Saturated region is d Id/ dVds (almost) zero constant while ohmic is some value constant linear.

[@user-ul7gv6yu8j]

What’s the effect of increased VGS on RDS(on) in the saturation mode?

[@danielchatrie3517]

Hello my biggest issue is the data sheet don’t have any information about frequency matching output wattage of any fet or igbt

[@abeditani8293]

IAM working on DC linear mode and in high temperature . So iam testing a 1200w mosfet 200v 60A but what every I do it always fail in 40V 10A

[@easyamp123]

what mosfet are you using? Those could be some costly mistakes you are making. 200v at 60a is asking a lot of any mosfet, even 2kw mosfets, especially if you haven't got your cooling situation on lock down.

[@kkp7550]

Aren't temp coefficients defined w.r.t. resistance? It would have been much easier to understand if the engineer mentioned that the devices have a negative temp co-efficient that would in turn result in thermal runaway

[@chuckjls]

What about temperature derating?

[@karlivares8401]

Great !

[@johnaweiss]

16:06 Unclear. Are you saying the DS is getting pulsed? Not the gate? Isn't mosfet switching all about pulsing the gate?

[@TexasInstruments]

Hi johnaweiss, thank you for reaching out. Please post your question on our E2E Support Forum: e2e.ti.com/support/logic/f/151. You are also able to browse the 400,000 existing answers on E2E Support Forums or access our technical resources on ti.com without an account.

[@easyamp123]

thermal runaway, not thermal runway 8:49 9:47

[@Conservator.]

Decreasing the SOA for ‘aesthetic’ reasons seems very odd to me.

[@abeditani8293]

Temperature 100c