Remoticon 2020 // Zero to ASIC: Silicon Design with Skywater-PDK
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- Опубліковано 16 тра 2024
- Matt Venn demonstrates how to go from zero to ASIC during this workshop held live during the 2020 Hackaday Remoticon. It gives you a good overview and basic grasp of the terminology and processes involved.
The demo shows the current capabilities of the Open Source tools and the Open Google/Skywater Process Design Kit (PDK) and free ASIC service (shuttle).Start from a simple digital design on paper and follow the process used to create the pattern files needed by the factory to build the ASIC. Synthesis of the hardware description language into basic digital building blocks like NAND gates and flip-flops.
About the instructor: Matt Venn has been doing some combination of electronics and teaching for most of his life. Most of the work is on the science communication spectrum; some is pretty straight electronic engineering and some is explaining concepts on youtube. A few years ago, he got into FPGAs, and more so after the Open Source flow was released. The recent Open Google/Skywater PDK and free shuttle announcement has now created the possibility to see one of his designs on a chip!
Disclaimer: I am not an expert and have yet to tape out my first chip. I have spoken to and received advice from a number of experts and applied to the first Google/Skywater shuttle in November.
Read the article on Hackaday:
hackaday.com/?p=453979
Slides for this talk:
docs.google.com/presentation/...
Learn more on the Zero to ASIC Page:
www.zerotoasiccourse.com/
Music by Rich Hogben - Наука та технологія
Good job making this accessible to a wide audience. I have no experience in silicon design or ASIC, but was able to follow and enjoy the presentation. I doubt I will need to design my own silicon but now I know that I probably could.
it nice having the banner cover the stuff hes typing in the console...
oh yeah, just saw that - that's a shame
@@ZeroToASICcourse I really enjoyed your presentation, thanks for taking the time to do this.
Great presentation, now I have a little clearing understanding on how asics are developed.
Best video ever.... Can't believe opensource have reached such a milestone...🎉🎉
This is such a massive breakthrough! Very excited about this, can't wait to see what ASICs get built using these tools!
I'm just realizing i should study within this field, great!
We've added the unedited version which does not cut off the console. Our apologies!
ua-cam.com/video/ILZ6fDHZ_eo/v-deo.html
Thanks, that is awesome!
Thankyou (Y)
With MEMS, analog RF, SRAM, and digital on the same process, I wonder whether a functioning Bluetooth earpiece with a MEMS microphone and hardware codecs would be out of reach, and how much area that would be in 130nm. Maybe you'd need more chiplets to do beamforming, but still cool.
looking forward to someone making a VHDL/verilog to open silicon converter....or a drag'n'drop interface... the future is sweet when chips are as available as pcb's... gonna sleep well tonight!
In the grand tradition of software engineering, now hardware engineering, your 16 MHz verilog code has an off-by-one bug. It changes the digit every 16,000,001 clock cycles. 😜
Hi, I would like to get your opinion on the subject, maybe you can help. If different from all existing technologies,
Therefore, if you had developed a method that is much faster, consumes less energy, is much safer and has a much lower investment cost. How would you evaluate it without losing it to others? A secure investor, developer and the intelligence to create all aspects of the related process Where and how did you find it?
Will this process and these tools support mixed signal designs ? Analog and digital ?
Yes, but I'm focused on the digital side right now. See my zero to asic channel for a recent interview with someone designing analog.
Wish the banner was not in the way of the bottom of the screen, cannot see what is being typed.
Hello.
I don't understand any of this. I mean, these command lines.
I've noticed this happening more and more these days.
I'm a bit confused about this. and it's confusing... because we were striving for a graphical interface. the era of dosa is over... and here it turns out. that many people suddenly use some incomprehensible interfaces. where you have to enter everything manually. I guess I'm backwards. where to get such knowledge... I don't know... best regards...
Hi, could you provide me your presentation? i'm thinking about translating it to my students, if possible.
At S2C, we aim to pave the most innovative technological path for designers everywhere S2C s Prodigy Logic Systems and other prototyping solutions are built to help designers streamline their SoC emulation, simulation, validation, and verification processes Verifying the performance and design of ASIC FPGA prototyping boards is made easy with our systems Also, S2C s heterogeneous verification platform lets you conduct ASIC simulation, validation, and verification within a small amount of time S2C s prototyping products come in different versions and modules to cater to each designer s unique needs
I recently founded a company to design asic mining devices. My first company was acquired by a Fortune 500 in 2018. I don’t know Chip design but I do have a vision and need a team. Let me know if you are interested.
I'm interested and I'm learning how to design a chip and integrate it with interconnects!
Do let me know if you are still looking for people.
Help me to create a asic to mining private key wallets
Nice presentation. Could have been better were there not the annoying banner at the bottom.
revolution and commerce go like facebook and politics :)
worst video editing, unable to see commands, because of banner at the bottom