Very nicely explained. From the title, I was hoping this would be about locally referenced guard rings like you see around high impedance inputs. (It looks like Everyone's Least Favorite Wiki calls that a "driven guard," but that's what I always think of when I hear "guard ring.") Some precision op amp packages have guard pins to facilitate this, but with standard packages it's usually just wrapped around the input. I like to drive the guard with a separate voltage follower tied to the reference pin; I'm aware that this is "to paint the lily, to gild refined gold" with most of my designs, but it's a reasonable use of that spare op amp you'll often need to tie off as a voltage follower anyway. EDIT: I should note that most PCB editors like to be a pain (and this could be the end of the sentence right there) about driven guards because the software thinks they look like unnecessary current paths. I'm sure there are design rules that can be tweaked to make the editor a bit more cooperative...
I'm seeing some other people who mention the driven guard, CAD tools are funny like that and I think you would have to turn off the design rule for that specific net. Sounds like it's worth doing a video on it.
@@Zachariah-Peterson The KiCad forum suggests treating the driven guard as a separate component with a custom footprint for each instance, similar to a shielded can. If it's worth touching on this subject in a video, it should probably be within the broader context of shielding. It might also be a good tie-in to your previous video about distributed-element design.
When I think of "guard rings", I tend to think of ground traces that encircle high impedance inputs on some op-amps or sometimes crystal inputs on MPUs. Is this alternate form of guard ring recommended?
This implementation appears to be general solution to protecting the components inside the guard ring from any external EMI and vice versa. I’ve seen this type of ring used in systems such as the PS5 separating the wireless interface from the rest of the motherboard and serves as the “ring” used for the mounting screws to mount the motherboard to chassis. In essence, your solution works tremendously for many applications (assuming you’ve been having success), but the guard ring appears to be another addition measure that can be employed to ensure that EMI protections are as robust as possible by keeping internal signals localized within the guard ring, blocking external interference, and potentially serving as a great place to throw in some mounting holes. Not an expert by any means, just sharing my thoughts.
Driven guard rings are typically for high impedance DC, e.g. opamp inputs and such, to try to minimize creepage where even nanoamps matter. The guard ring in this video assumes high frequency switching noise that cause EMI. But the part about shielded connectors left much missing. Connecting the shield of shielded connectors like this, without having them tightly fitted in an opening in a metal chassis, doesn't have much benefit. Maybe for ESD purpose, but it won't do much for EMI. To have an impact on EMI, shielded connectors must be fitted in a tight opening in a metal chassis and the shield must in contact with the chassis all around the connector, no gaps.
It would be nice if You could go more specific for ESD/EMI standards. I am designing a board, I also made guard ring (edge plating), connected throw 0R to GND. I was told it would provide better resistance for EMC test. Also regarding EMI I made a break that You criticize in the video, I didn't understand Your point. I would like if you design some examples for different application (my is lipo battery powered) and show in details, how to create guard ring , so device will pass EMC compliance test. And would not create more problems on EMI test. What is thickness? Should I connect it directly to GND, or throw resistor/capacitor? What parameters? Nobody is really specific in this area.
Sometimes I wonder how big that emc problem is for most of us. The first thing we should do is measuring. Even with making mistakes on purpose in pcb’s it wonders me how insignificant those generally are for the hobby product.
Thanks for great video! I love you!=) My question is: "I didn't see layers "L2_GND" and "L5_GND"" in altium's exaple. I think that's power plane (negative). Is there should cut ground for Guard Ring?
Im confused by use of guard ring and ground islands around crystal ossilator layouts, especilly on 4 layer. Do you have a video on this? Ground islands and 'directing ground currents' sounds like the oposite Ive been learning to gain good EMC performance.
The usage here is not for directing return currents from a signal, which is essentially what you are referring to. We are talking about putting a ground conductor around the PCB to provide a path for currents induced on a shield. The guard ring is also not a separate net per se, it is connected to the main system ground so that they have the same potential as this eliminates the potential radiation from disconnected grounds.
In some design there are also more things to consider like thermal cooling. We often connect the "guard ring" on top to solid planes on internal layers. this ofcourse negate some effect of the guard ring but its still sufficient in most cases whilst creating a better path for heat to get out of the PCB.
Thanks for the video, it was very useful. I have a few questions: 1) What about the ground for ESD protection? I guess the TVS diodes should be placed near the connector and referenced back to the guard ring/chassis GND. 2) What do you think about high-frequency capacitors at each mounting hole between the mounting holes and the guard ring? 3) What should be the width of the connection between the chassis GND and system GND? Is a 0-ohm resistor (e.g. 0603) enough, or should a larger polygon pour be used? 4) How to avoid ground loops if the chassis GND is connected to system GND at the power connector? Does this mean that the cable shields should only be connected at one side?
1) Place TVS to whatever conductor you want to be used to carry any current from ESD, in this case it would be the ring. 2) When a net tie is replaced with a cap, the return path to the power input exhibits low impedance for high frequencies but not low frequencies. As a result, any low-frequency currents induced in the chassis area radiate strongly from it. In such cases, a larger capacitor or a direct connection may be necessary. 3) Large case 0 Ohm resistor is fine. If you use caps (see above) maybe it will end up a bit larger. 4) Are you asking this because the chassis ground looks physically like a loop? Ground loops arise due to potential offset between two points in a ground net, which forces a current to flow. Low impedance connections that equalize the potential across all of the ground is what prevents ground loops. About the cable shield, it depends. As far as I know, audio cabling has shielding grounded at both ends.
They do not need to be large, it should be large enough to cover the vias you are using to connect any ring on multiple layers. If you have a connection to a metalized enclosure, then the copper on the guard ring should be exposed and it may need to be a bit larger to make good contact with the enclosure.
Don't you think that extending gnd under a guard ring creates an additional path for ESD thruogh cpacitance between the layers? And ESD can reach the inner circuit
About the capacitive coupling, yes it exists but calculating the capacitance between the rail and a plane and you will see that it's quite small. Compare that with the impedance of a large rail and you'll find that most of the energy is dissipated via conduction rather than displacement current. About the inner circuit, how exactly is ESD going to reach inner circuit layers if a connector shield only attaches to the ring region.
Should we isolate somehow the guard ring from the system ground with caps ? Are not the system chasis a source of noise to the system ground if they are tied together without isolation? Thanks !
There is always some debate on this unfortunately. If you use caps instead of a net tie then you will have low impedance return to the power input for high frequencies but not for low frequencies. So if you have any low frequency currents that are induced in the chassis region, then they will radiate strongly from the chassis, and then maybe a bigger capacitor or a direct connection is needed.
I didn't quite see how would you extend the "component ground" to the connector references in that PCB. Do you have the connector shield connect directly to the guard ring and then the data pins with their references connect into the "component ground"?
You can always extend the component ground region on the internal ground layer into the vicinity of the connector. If you place the component ground as pour and assign it to a different net then it will always pour around any vias on the grounded guard ring, this then allows you to keep the component ground near the signals coming off the connector. You can then tie the component ground and the guard ring back to each other with a net tie somewhere else on the board, normally this is done near the power input.
hi @Zachariah-Peterson i see in some designs that they make a chassis using 1KV or higher capacitor with 1MΩ resistor connected to the main ground is that correct way for that?
As is usually the case, it really depends. Do you have an earth connection, isolated power supply on the board, or is it a board that only takes in a DC source and has a the outer ring as a safety ground? The RC connection is normally used when you have a shielded connector going back to the system ground in order to dissipate some energy from an ESD event on the connector body. If you had a shielded connector and a guard ring, I would prefer to do a direct connection to the guard ring, and potentially use a direct connect to the power return right at the power entry. Whether you use the RC circuit also depends on the ESD/EMI standards you need to operate under. For example, aerospace testing is more rigorous than general purpose or commercial products, so the connections between those shields and grounds may need to be different to comply with the standards.
If you're referring to using the ring region as the ground reference for an RF filter, that may not be a good idea if the filter is placed in the main region of the board. Are you interested in an integrated filter component, or is it a printed filter?
I asked, and you're doing the video! Thanks! Wish the best for your newborn.
Very nicely explained. From the title, I was hoping this would be about locally referenced guard rings like you see around high impedance inputs. (It looks like Everyone's Least Favorite Wiki calls that a "driven guard," but that's what I always think of when I hear "guard ring.") Some precision op amp packages have guard pins to facilitate this, but with standard packages it's usually just wrapped around the input. I like to drive the guard with a separate voltage follower tied to the reference pin; I'm aware that this is "to paint the lily, to gild refined gold" with most of my designs, but it's a reasonable use of that spare op amp you'll often need to tie off as a voltage follower anyway.
EDIT: I should note that most PCB editors like to be a pain (and this could be the end of the sentence right there) about driven guards because the software thinks they look like unnecessary current paths. I'm sure there are design rules that can be tweaked to make the editor a bit more cooperative...
I'm seeing some other people who mention the driven guard, CAD tools are funny like that and I think you would have to turn off the design rule for that specific net. Sounds like it's worth doing a video on it.
@@Zachariah-Peterson The KiCad forum suggests treating the driven guard as a separate component with a custom footprint for each instance, similar to a shielded can. If it's worth touching on this subject in a video, it should probably be within the broader context of shielding. It might also be a good tie-in to your previous video about distributed-element design.
When I think of "guard rings", I tend to think of ground traces that encircle high impedance inputs on some op-amps or sometimes crystal inputs on MPUs. Is this alternate form of guard ring recommended?
This implementation appears to be general solution to protecting the components inside the guard ring from any external EMI and vice versa.
I’ve seen this type of ring used in systems such as the PS5 separating the wireless interface from the rest of the motherboard and serves as the “ring” used for the mounting screws to mount the motherboard to chassis.
In essence, your solution works tremendously for many applications (assuming you’ve been having success), but the guard ring appears to be another addition measure that can be employed to ensure that EMI protections are as robust as possible by keeping internal signals localized within the guard ring, blocking external interference, and potentially serving as a great place to throw in some mounting holes.
Not an expert by any means, just sharing my thoughts.
Apparently that's called a "driven guard." TI and Analog have ap notes on these.
Driven guard rings are typically for high impedance DC, e.g. opamp inputs and such, to try to minimize creepage where even nanoamps matter. The guard ring in this video assumes high frequency switching noise that cause EMI. But the part about shielded connectors left much missing. Connecting the shield of shielded connectors like this, without having them tightly fitted in an opening in a metal chassis, doesn't have much benefit. Maybe for ESD purpose, but it won't do much for EMI. To have an impact on EMI, shielded connectors must be fitted in a tight opening in a metal chassis and the shield must in contact with the chassis all around the connector, no gaps.
I've always had questions around guard ring structures, thank you for this brilliant tutorial. Very helpful!
Guard traces would nice for another video
Here you go: ua-cam.com/video/grjvwLWDYfU/v-deo.html
It would be nice if You could go more specific for ESD/EMI standards. I am designing a board, I also made guard ring (edge plating), connected throw 0R to GND. I was told it would provide better resistance for EMC test. Also regarding EMI I made a break that You criticize in the video, I didn't understand Your point. I would like if you design some examples for different application (my is lipo battery powered) and show in details, how to create guard ring , so device will pass EMC compliance test. And would not create more problems on EMI test. What is thickness? Should I connect it directly to GND, or throw resistor/capacitor? What parameters? Nobody is really specific in this area.
Sometimes I wonder how big that emc problem is for most of us. The first thing we should do is measuring. Even with making mistakes on purpose in pcb’s it wonders me how insignificant those generally are for the hobby product.
I will support, I would also like to see a video on the topic EMC
Thanks for great video! I love you!=) My question is:
"I didn't see layers "L2_GND" and "L5_GND"" in altium's exaple. I think that's power plane (negative). Is there should cut ground for Guard Ring?
L2 and L5 were defined as plane layers and only used for ground. The vias for the ring pass through the ground net in L2 and L5.
Very helpful, thank you.
Im confused by use of guard ring and ground islands around crystal ossilator layouts, especilly on 4 layer. Do you have a video on this?
Ground islands and 'directing ground currents' sounds like the oposite Ive been learning to gain good EMC performance.
The usage here is not for directing return currents from a signal, which is essentially what you are referring to. We are talking about putting a ground conductor around the PCB to provide a path for currents induced on a shield. The guard ring is also not a separate net per se, it is connected to the main system ground so that they have the same potential as this eliminates the potential radiation from disconnected grounds.
In some design there are also more things to consider like thermal cooling. We often connect the "guard ring" on top to solid planes on internal layers. this ofcourse negate some effect of the guard ring but its still sufficient in most cases whilst creating a better path for heat to get out of the PCB.
Thanks for the video, it was very useful.
I have a few questions:
1) What about the ground for ESD protection? I guess the TVS diodes should be placed near the connector and referenced back to the guard ring/chassis GND.
2) What do you think about high-frequency capacitors at each mounting hole between the mounting holes and the guard ring?
3) What should be the width of the connection between the chassis GND and system GND? Is a 0-ohm resistor (e.g. 0603) enough, or should a larger polygon pour be used?
4) How to avoid ground loops if the chassis GND is connected to system GND at the power connector? Does this mean that the cable shields should only be connected at one side?
1) Place TVS to whatever conductor you want to be used to carry any current from ESD, in this case it would be the ring.
2) When a net tie is replaced with a cap, the return path to the power input exhibits low impedance for high frequencies but not low frequencies. As a result, any low-frequency currents induced in the chassis area radiate strongly from it. In such cases, a larger capacitor or a direct connection may be necessary.
3) Large case 0 Ohm resistor is fine. If you use caps (see above) maybe it will end up a bit larger.
4) Are you asking this because the chassis ground looks physically like a loop? Ground loops arise due to potential offset between two points in a ground net, which forces a current to flow. Low impedance connections that equalize the potential across all of the ground is what prevents ground loops. About the cable shield, it depends. As far as I know, audio cabling has shielding grounded at both ends.
Thank you very much for sharing.
I have one question to ask you.
What is the recommended width for the Ground ring?
They do not need to be large, it should be large enough to cover the vias you are using to connect any ring on multiple layers. If you have a connection to a metalized enclosure, then the copper on the guard ring should be exposed and it may need to be a bit larger to make good contact with the enclosure.
Don't you think that extending gnd under a guard ring creates an additional path for ESD thruogh cpacitance between the layers? And ESD can reach the inner circuit
About the capacitive coupling, yes it exists but calculating the capacitance between the rail and a plane and you will see that it's quite small. Compare that with the impedance of a large rail and you'll find that most of the energy is dissipated via conduction rather than displacement current. About the inner circuit, how exactly is ESD going to reach inner circuit layers if a connector shield only attaches to the ring region.
Should we isolate somehow the guard ring from the system ground with caps ? Are not the system chasis a source of noise to the system ground if they are tied together without isolation? Thanks !
There is always some debate on this unfortunately. If you use caps instead of a net tie then you will have low impedance return to the power input for high frequencies but not for low frequencies. So if you have any low frequency currents that are induced in the chassis region, then they will radiate strongly from the chassis, and then maybe a bigger capacitor or a direct connection is needed.
I didn't quite see how would you extend the "component ground" to the connector references in that PCB. Do you have the connector shield connect directly to the guard ring and then the data pins with their references connect into the "component ground"?
You can always extend the component ground region on the internal ground layer into the vicinity of the connector. If you place the component ground as pour and assign it to a different net then it will always pour around any vias on the grounded guard ring, this then allows you to keep the component ground near the signals coming off the connector. You can then tie the component ground and the guard ring back to each other with a net tie somewhere else on the board, normally this is done near the power input.
hi @Zachariah-Peterson
i see in some designs that they make a chassis using 1KV or higher capacitor with 1MΩ resistor connected to the main ground is that correct way for that?
As is usually the case, it really depends. Do you have an earth connection, isolated power supply on the board, or is it a board that only takes in a DC source and has a the outer ring as a safety ground? The RC connection is normally used when you have a shielded connector going back to the system ground in order to dissipate some energy from an ESD event on the connector body. If you had a shielded connector and a guard ring, I would prefer to do a direct connection to the guard ring, and potentially use a direct connect to the power return right at the power entry. Whether you use the RC circuit also depends on the ESD/EMI standards you need to operate under. For example, aerospace testing is more rigorous than general purpose or commercial products, so the connections between those shields and grounds may need to be different to comply with the standards.
Can guard ring be used to reference an RC filter?
If you're referring to using the ring region as the ground reference for an RF filter, that may not be a good idea if the filter is placed in the main region of the board. Are you interested in an integrated filter component, or is it a printed filter?
Hi Zach, I can't find proper information about what has to be a diff impedance for ethernet, can you help me with that?
Differential impedance for Ethernet is 100 Ohms.