Clock Domain Crossing (CDC) Basics | Techniques | Metastability | MTBF | VLSI Interview questions

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  • Опубліковано 31 жов 2024

КОМЕНТАРІ • 20

  • @Electronicspedia
    @Electronicspedia  2 роки тому

    Please Like, Share and Subscribe to my channel ua-cam.com/channels/3mTACG8vPWsHQFMfxzeDZg.html

  • @cyrillemagdi7717
    @cyrillemagdi7717 2 роки тому +3

    Thanks a lot for your amazing covering of the CDC topic.

  • @jogeshsingh854
    @jogeshsingh854 2 роки тому +2

    Good content regarding CDC by visual presentation 👍🏼👍🏼👍🏼 😊

  • @Naveenkumar-mj8eh
    @Naveenkumar-mj8eh 2 роки тому +1

    Good keep posting sta examples ,different concepts asked in interview with examples makes good content

    • @Electronicspedia
      @Electronicspedia  2 роки тому

      Thanka Naveen. Sure will cover all the topics in upcoming videos. Keep watching this space 🙂

  • @vikasbansal4180
    @vikasbansal4180 Рік тому

    Amazing lecture, thanks sir

  • @ankitsingh-wg3cn
    @ankitsingh-wg3cn 2 роки тому +1

    Nice explanation Ravi

  • @srcreations8895
    @srcreations8895 2 місяці тому

    Hello sir, can I know what are the qualifications you have to teach this concept

  • @HDgaming345
    @HDgaming345 Рік тому

    Hi. Nice video and explanation. Where is part 2?

  • @nikitajavali1055
    @nikitajavali1055 2 роки тому

    Good one👍

  • @karthishanmugam5674
    @karthishanmugam5674 2 роки тому +2

    Hi sir,
    I have some doubts in MTBF,
    If tx is working with 1MHz and rx is working with 1GHz
    How many stages used in synchronisation for single bit transfer from tx to rx,with the help of MTBF
    Thanks for advance

    • @Electronicspedia
      @Electronicspedia  2 роки тому

      Stages of synchronization depends on tech node and it comes from library cell information.

  • @pranavgupta4552
    @pranavgupta4552 2 роки тому

    Hi..
    If due to metastability wrong data is sampled by 2nd FF in double syncronizer , how to take care this situation.

    • @Electronicspedia
      @Electronicspedia  2 роки тому

      If 2nd FF goes into metastability then 3 stage synchronizers are required. Usually upto 1 GHz 2 stage synchronizers will work

    • @----700
      @----700 Рік тому

      ​​@@ElectronicspediaI have a doubt regarding metastability. Please help me out.
      At 9:46 as sigA changes in setup-hold window of clkB , sigB becomes metastable. But isn't it sureshot that signal B will come out of metastability at next rising edge of clkB as input A doesn't change in the setup-hold window.
      Or is it possible that sigB remains metastable even after next rising edge of clkB. If yes then what's the reason?