structure modelling in vhdl

[@rupeshgupta2375]

Please add more videos... Its exam time.... You will be more helpful than text books

[@meenakshiparmarparmar5126]

awesome i learnt so much.. u should make more videos on vhdl waiting for more...thank u

[@pratikshagupta1036]

Nice video explaination on page is understandale than any other videos on utube on software ... Make such more videos 😀😀

[@suresanrahul5646]

Brilliant explanation

[@dhananjayshirke520]

Very nice explanation

[@uccoskun]

wow, nice, i like this type of tutorial more than very fast compressed ones.

[@AyushSingh-vl9jy]

Really helpfull,kindly upload more vedio so that ,during quarantine ,we can go through this

[@suyushona]

Thank you. You are v good at explaining .I hope you are verymuch successful in life by now ✌✌✌

[@vanessasanthumayor4317]

You’re awesome ♥️

[@dhirajmandal715]

Thank you very much it helps a lot♥️♥️

[@zehrabatool2112]

Great sir
Thank you

[@fullongaming4122]

❤❤thanku sir

[@fungaitakunda8718]

nice job sir

[@abderazakcherfi]

Thank you so much !!! it was very helpful

[@adwai6713]

Nice video👌

[@ayushsinghkalvi943]

Great effort !! Thumbs up for you man ✌️✌️

[@ALBRON-23]

MVP man. Helped alot!

[@adilsaju2994]

thank you very much. great video,easy to learn (y)

[@sharvilghate4759]

do we have to write the architecture of the components ??

[@eltonruco3598]

Really nc man, thank you so much for the help

[@akshatjain2986]

I'm new to thing language!
And i guess it will not do anything as he hasn't defined the operation of any gate i.e. How will the or1 & and1 work and give output!!
Please correct me if I'm wrong..🙂

[@simba5876]

best explanation ever. can i know what college are u from?

[@amitkosa5387]

Nicely explained

[@bhavyabhavya2780]

thanks sir super explanation

[@srisaitejagarimella4501]

hi bro a small doubt there are same inputs for and gate and or gate then how to declare the port in component

[@specialpsychopath]

Thank you so much! This was really helpful!

[@ahmedjiji3819]

great video thanks a million, I have a question what is the use of S, T, X,Y declared in the component

[@jakirshaikh2806]

P pm
Do

[@srilakshmiputtareddy8545]

please make more videos on vhdl
thanks for all ur videos

[@66saly]

Thanks, it very helpful explanation !

[@khidrkhan9277]

How the logical operator will work in structural modelling is it not necessary to write formula for and & or gate.

[@mdabubakar6874]

Same question

[@mdabubakar6874]

Admin plz reply?

[@ra_nyk]

How it will understand that it has to do and operation or operation

[@apurvapete3800]

Thank you so much❤️

[@tabrezhasan4272]

Thanks bro keep posting

[@nick_goldy]

You-are-a-life-saver

[@lolakutony3457]

what is the advantage and the limitation of structural and behavioral design style

[@davejenil1537]

Where is the logic ?will it generate the output

[@nehachaudhary8221]

what if i had OR gate instead of AND...in decalaration part

[@yassinebelahmar4675]

E and F should be a buffer or INOUT .. they play two roles (IN AND OUT) in the same time ..

[@sang625]

Yassine Belahmar so that's why we take them as a signal?

[@brandm5176]

Thanks!

[@i_am_vengeance_kumar]

thank you very much

[@aryelchouchan2719]

Thanks it helped

[@akhtarin]

nice explanation!

[@ashutoshdakshana9637]

sir plz make more video on vhdl. thank you

[@mohammedfaizan3362]

Are E&F to be declared ?

[@ALBRON-23]

E & F are signals, they must be declared.

[@ozdemirhasan]

Thanks :)

[@mohamedigadarne6709]

thank you

[@sajansharma_10dec]

Bro make more videos on vhdl programming

[@alfredwhittingdale9192]

7:28 -- 7:29: _"You can take any instances. Instance 1,2,3 or any keyword."_
You mean any "user-defined word", don't you? Keywords are predefined and cannot be used to name signals or variables.

[@jadevid598]

greaaaaaaaaaaaaaaaaaat

[@jboy6944]

Like cos of the beat

[@jeroen207]

Great video, only thing is the way you pronounce component is wrong.

[@IndiceEducation]

Nice presentation and knowledgeable but buy a Neil cutter mate. Health and hygiene is more important then screwing😜

[@shashithaperera8416]

thank u very much