Direct Mapping in Cache Memory (in hindi) | Cache memory mapping | direct mapping | address mapping

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  • Опубліковано 14 гру 2024

КОМЕНТАРІ • 36

  • @SandeepKumar-xy1ys
    @SandeepKumar-xy1ys 5 років тому +5

    sir aaapko charansparsh pranam........you are the best computer organisation teacher on youtube ....

    • @LSAcademy007
      @LSAcademy007  5 років тому +2

      Thanks for your appreciation....

  • @AbhishekRajput-mg9tw
    @AbhishekRajput-mg9tw 5 років тому +21

    Sir you’re the reason why i get passed in coa🌹 thank you.

  • @CoderVroni
    @CoderVroni 3 роки тому +11

    I feel bad that we pay our college teachers in lakhs for reading ppt's and such great teacher teaches for free on UA-cam. Thankyou Sir.

  • @lalitkumar_kvs9383
    @lalitkumar_kvs9383 3 роки тому

    Itni videos dekhta hu ..par aapki videos he sabse achhi lagti he ... bhot hi achhi tarah se xolain karte he aap...

  • @autotechtraveller8787
    @autotechtraveller8787 3 роки тому +2

    In One word to describe You is Sir
    " Aapka video milgaya kisike topic ke samajlena us topic ko hame samajagaya"
    That's what i felt from your Content sir ..
    Awesome Your Teaching Sir Each every Topic Just Crystal Clear Teaching and Teacher 👏🇮🇳

  • @ritikkashyap2447
    @ritikkashyap2447 5 років тому +1

    I think you are the best lecturer in CO

  • @BilalHassan-vy9oi
    @BilalHassan-vy9oi 4 роки тому +3

    I passed in computer architecture because of you

  • @ghanshyambarbhaya7910
    @ghanshyambarbhaya7910 4 роки тому +4

    Thank you sir, I like the way you explaining.....😀👌🏻🙏👌
    It becomes so easy to understand... and remember

  • @rahulbhatt1
    @rahulbhatt1 3 роки тому +2

    Clear concepts explanation great with great association with other topics!!

  • @rhythmtomar7872
    @rhythmtomar7872 5 років тому +2

    Always clear every concept of coa 😘Thanku so much sir

  • @mr.unknown0815
    @mr.unknown0815 3 роки тому

    King of Computer Organization 👑🤴

  • @everymaterialforstudy4893
    @everymaterialforstudy4893 3 роки тому

    Sir i am student of niet, teching y of my teacher is not god that'swhy i feel that coa is a very tough boring subject but when i study by our channel i understand all concept of coa thank you sir for sharing the knwoledge now i feel it is very interesting subject

  • @hibamariam4405
    @hibamariam4405 3 роки тому

    sir best explanation...i am very greteful to u....hats off

  • @HimanshuMishra-nw7uu
    @HimanshuMishra-nw7uu 10 місяців тому

    thank u so much sir.. Excellent lecture😍

  • @vaibhavsingh2239
    @vaibhavsingh2239 3 роки тому +1

    Sir , you are great🙏🙏🙏🙏

  • @keshawam9656
    @keshawam9656 2 роки тому

    Very helpful Sir
    Sir salute to you Sir

  • @RaghuvanshmaniSingh
    @RaghuvanshmaniSingh 11 місяців тому

    🙏 you sir for this great lecture

  • @lovelymangal501
    @lovelymangal501 3 роки тому

    Really perfect explanation ❤️👍🏻

  • @mdfarhansayeed3885
    @mdfarhansayeed3885 5 років тому

    Very effective and nice lecture...Sirr.

  • @irshadahmad4366
    @irshadahmad4366 5 років тому +2

    thnak you sir

  • @aarfasayyada9656
    @aarfasayyada9656 Рік тому

    Thank u sir ☺️

  • @bintech3837
    @bintech3837 3 роки тому

    awesome , it is called cache line i think rather than cache block

  • @vinayaksharma-ys3ip
    @vinayaksharma-ys3ip 3 роки тому

    Thank you Sir 👍👍👍💯

  • @SagarSingh-yv5xz
    @SagarSingh-yv5xz 4 роки тому +1

    Good

  • @RohitSir
    @RohitSir 28 днів тому

    Sir tag 3 bit ki nikale hain per main memory mein total 128 blocks toh cache ki tag 3 bits kyun hogi ??

  • @abhishekbhaware6719
    @abhishekbhaware6719 4 роки тому

    sir can you solve this question plzzz..
    i am not getting this question
    What is the total size (in bytes) of a direct mapped cache with the following configuration in a
    32 bit system? It has a 10 bit index, and a block size of 64 bytes. Each block has 1 valid bit and 1
    dirty bit.

  • @bhagwaanhu579
    @bhagwaanhu579 5 років тому

    Cpu generates logical address right.. how without accessing pagetable present in ram, we can convert to frame no and then check cache line based on tag.. one ram access is needed right?

    • @LSAcademy007
      @LSAcademy007  5 років тому +3

      page table can be in registers, in TLB also. it need not be in RAM

  • @pintulakra1992
    @pintulakra1992 4 роки тому

    Cache memory ka introduction video nai hai kya?

  • @DesiWitHub9
    @DesiWitHub9 4 роки тому

    👍👍

  • @vikramsinghchauhan760
    @vikramsinghchauhan760 5 років тому

    👌