COMPLETE TIMING CONSTRAINTS | PHYSICAL DESIGN |ASIC | ELECTRONICS | VLSIFaB

[@chintu8700]

good video about timing constraints, Tq VLSIFaB

[@VLSIFaB]

Welcome.. please share

[@gaur31]

Nice 👍

[@VLSIFaB]

Thanks ✌

[@VLSIFaB]

Please share latest video of vlsifab in your circle ua-cam.com/video/xrVyGz6Bzu8/v-deo.html

[@rajashreejc1173]

Hi sir...good explanation..can you please provide details of more arguments of set_clock latency

[@VLSIFaB]

Please share latest video of vlsifab in your circle ua-cam.com/video/xrVyGz6Bzu8/v-deo.html

[@abishekguggari1180]

Thank u sir

[@VLSIFaB]

Welcome

[@VLSIFaB]

Please share latest video of vlsifab in your circle ua-cam.com/video/xrVyGz6Bzu8/v-deo.html

[@User--jm5916]

Sir if you don't mind can you tell why hold check is in same clock cycle while setup check in next clock cycle

[@merrygo7189]

Hi ,,Can you tell me.. what is the use of unclocked flops ...?

[@VLSIFaB]

Please share latest video of vlsifab in your circle ua-cam.com/video/xrVyGz6Bzu8/v-deo.html

[@pavankumarmvs6728]

very gud explanation. when we are mentioning clk uncertainity, why we are substracting from setup and for hold why we are adding that uncertainity. can you please give a bit information about ir

[@VLSIFaB]

Please share latest video of vlsifab in your circle ua-cam.com/video/xrVyGz6Bzu8/v-deo.html

[@saivarma858]

Please make video on read verilog your videos are hepling for people like us who are freshers in VLSI industry

[@VLSIFaB]

Thanks.. surely will try to make videos .

[@VLSIFaB]

Please share latest video of vlsifab in your circle ua-cam.com/video/xrVyGz6Bzu8/v-deo.html

[@prasanthpasumarty8513]

Your explanation is really good.. can you send me the link where you have explained regarding unconstrained endpoints

[@VLSIFaB]

Please share latest video of vlsifab in your circle ua-cam.com/video/xrVyGz6Bzu8/v-deo.html

[@muralijha8703]

SIR you are TOO GOOOOOOOOOOOOD .PLZ KEEP ON MAKE VIDEOS

[@VLSIFaB]

Oh thanks..for your gooooood😛

[@VLSIFaB]

Please share latest video of vlsifab in your circle ua-cam.com/video/xrVyGz6Bzu8/v-deo.html

[@sanjusingertelugu9862]

hi sir will u provide classes on icc2 tool tq sir.

[@VLSIFaB]

Yah.. please paste the same comment in community section too.

[@anushak5318]

can you send me the link where you have explained regarding unconstrained endpoints

[@VLSIFaB]

Please share latest video of vlsifab in your circle ua-cam.com/video/xrVyGz6Bzu8/v-deo.html

[@shaileshkumar-gy4ue]

can u explain early and late switch plz

[@VLSIFaB]

Will explain it..

[@VLSIFaB]

Please share latest video of vlsifab in your circle ua-cam.com/video/xrVyGz6Bzu8/v-deo.html

[@pullepujaswanth5035]

can you create a video on library plz

[@VLSIFaB]

Yah sure..we are planning to start 5 minutes video series, in which we will include library also. Thanks for the suggestion.

[@VLSIFaB]

Please share latest video of vlsifab in your circle ua-cam.com/video/xrVyGz6Bzu8/v-deo.html

[@srikanth6078]

Sir please give more details about these library files

[@VLSIFaB]

Sure.. Will make one video on library files

[@VLSIFaB]

Please share latest video of vlsifab in your circle ua-cam.com/video/xrVyGz6Bzu8/v-deo.html