Plot Voltage VC for a RC : Analog circuit design interview question ( TI)

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  • Опубліковано 20 вер 2024
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КОМЕНТАРІ • 2

  • @HimanshuAgarwal_
    @HimanshuAgarwal_ 2 роки тому +3

    The steady state value of output on the capacitor will be Vi/2 with ripple of Vi*tau/4

    • @9935403017
      @9935403017 2 роки тому

      Hi Himanshu. How you calculated this formula for ripple (Vi*tau/4)? {unit is not volts} I am able to calculate numerically the extreme values between which cap voltage is oscillating but not directly using this formula.