2-Layer PCB Design Tips - Phil's Lab
Вставка
- Опубліковано 27 тра 2024
- Tips for designing with only two copper layers on a PCB (layer assignment, component placement, routing, GND jumps, RF considerations). PCBs by PCBWay www.pcbway.com
[SUPPORT]
Hardware design courses: phils-lab-shop.fedevel.education
Course content: www.phils-lab.net/courses
Patreon: / phils94
Free trial of Altium Designer: www.altium.com/yt/philslab
Altium 365: www.altium.com/altium-365
[GIT]
www.github.com/pms67
[SOCIAL]
/ philslabyt
[LINKS]
Stitching Vias Article: resources.altium.com/p/everyt...
2- vs 4-Layer EMC Video: • EEVblog #1176 - 2 Laye...
[TIMESTAMPS]
00:00 Introduction
02:01 PCBWay
02:41 Altium Designer Free Trial
03:33 Why 2 Layers?
05:54 Design Constraints
08:34 Layer Assignment & Board Thickness
11:24 Component Placement
14:40 Routing Order, Power Routing
16:49 Signal Routing, GND Jumps/Pours/Stitching
23:06 RF & Controlled Impedance
28:54 2- vs 4-Layer PCB Considerations
31:23 Outro - Наука та технологія
“Guys , we’re skipping lunch, Phil just dropped another one!”
Why not both lol, top tier lunch break content
😄
Gold mine of a channel
Thank you very much!
Facts
THanks Phil for the free yt tutorials. THey have given me more than the school fees that I paid as an electronics eng student. Your mode of delivery is concise, simple and creative. I have literally mastered KiCad by following your tutorials especially the STM32 boards design. I am currently working to up my skills in Altium also through your videos. I know you are in Europe, but your hardwork and generosity has blessed an African somewhere in Kenya. THanks once again. May life favour you and reward you even more. You are such a rare, precious, intelligent, impactful, insightful, resourceful......., breed on earth. I will definitely follow your stripes in career life
Thank you very much - I'm very glad to hear that the content has been helpful! All the best :)
Phil, I hope you get all of the sponsorship money in the world. You deserve it. You are the best PCB and electronics learning channel on UA-cam, bar none, and I have probably seen them all over the years. You have single-handedly pushed my own level of knowledge forward what would have otherwise taken me many, many years to attain on my own. You have my eternal respect and appreciation. Thank you ❤
That's very kind - thank you so much. Very glad to hear that the videos have been helpful!
Dear Phil,
Thank you so much! I started watching your tutorials since earlier this year as per the requirement of my internship and now I have a job in my hand ( I am a final year EE student) before my graduation just because of your tutorials, I was able to clear interviews. Thanks a lot, I learnt a lot from your tutorials.
Hi Aryan, That's awesome - I'm very glad to hear that the videos have been helpful. Congratulations on landing your new job!
Just graduated as CSE and now have a job that is largely PCB design lol, Phil is the GOAT
@@PhilsLab Thank you so much ❤
@@dylpickle8147Exactly man.
Great video! One sneaky thing I've done with very tight designs is route GPIOs from MCUs under the chip, then out by going through an unused pin. For example if I have a SPI bus signal that can't be swapped, I'd route it via a generic GPIO that's not used in the design. Obviously this can only be done if the pin is high impedance at boot, and it can then never be used. Can save space in a pinch though! Another option is to create a custom footprint with solder mask over the pins you don't need, so you can route under them, but some PCB houses complain about it if doing the PCBA, I've found. Obviously also some routing is easier if the component is rotated 45 degrees.
Very smart, how much experience do you have designing boards my guy?
Thank you! Yes, that's a great tip - and actually something I did just recently in a different design.
@@nimashirazi6307 Not as much as Phil :)
Damn Big Clive and his reverse engineering. He'll never work out what the heck is going on.
Had a project recently that I used a similar trick. The screen connector for the oled was as wide as the PCB making it difficult to route any signals past it. Luckily there were a bunch of unused pins that we passed signals through and it worked like a charm 🤌
Thanks Phil for another helpful lesson!
One additional trick I've seen is to cross a track on the top, by using a 0603 or larger component. This would be limited to slow-speed signals only. Of course, this adds components (and therefore cost) so it's useful only if you really need this. For example, the bottom can only be ground in some RF designs, as the PCB is intended to be attached to a heatsink of the same size. Or you just absolutely detest having tracks on the bottom, even when no one else will be seeing them!
Thank you - great tip!
I have used this in places to get my routed power around signal lines with 0 ohm resistors. It has the added benefit of allowing you to remove them to isolate things during troubleshooting etc.
Such a deep and detailed dive.
I do feel though that it is almost never recommended to use a 2- layer instead of 4-layers specially for RF.
But as you said your tips are also valid for PCBs with higher count layers.
Really excited for your video with the two PCBs communicating.
Thank you Phil.
Thank you! I agree, although there are many areas in industry where they are used (successfully). Personally, only when really necessary (or for simple, hobby projects such as this one) I go with two-layer designs.
@@PhilsLab Certainly. I have seen 2-layer designs used in many cost-optimized designs including in RF designs like those sub-dollar modules. I find it fascinating since it's a lot of fun to do the same or more with less.
4 layer prototype PCBs from some vendors are such a low extra cost vs 2 layer that it's just not worth it to go 2 layer for a prototype, unless you're doing it for the exercise@@PhilsLab
"RF schtick" 🤣🤣 Thanks so much for these awesome tutorials Phil, I recently just designed my 3rd board from an ESP32-S3 bare chip, thanks to your ESP32 hardware tutorial and Unexpected Maker's open source schematics! 😊😊
At jlcpcb going from 2 to 4 layers (50x50mm, all "base" settings and no expensive add-ons, 10pc) it goes from 50ct to 70ct per unit.
yeah, just pointless to go 2 layer for a hobby project in that case unless it's really something trivial where it needs zero thinking to do the design on 2 layers
The one big advantage of 2 layers is that my eyeballs can do the bed of nails test in a minute or so, and I have had problems in the past with defective internal layers that required a ton of time to figure out, and then the consequence is that the board is useless and unrepairable. Coupled with the propensity of engineers, myself included, of putting the ground and power planes on the inside layers, and one tiny defect can render the board entirely useless.
My worst issue once required 3 of my engineers 3 days to figure out that the fab house messed up and that the design itself was fine. 3 days doesnt seem like much, but it was a 100 million dollar project back when that was a lot of money. 😂 The boards cost 20k, the engineers cost 10k, and the interest loss was 100k.
Dear phill
I have to say…you channel is amazing
A fully mine of knowledge ❤️
Thank you so much from Israel 🇮🇱 ❤
Thank you very much for your kind comment!
If you can keep your design to 2 layers, another cool tool that you can use for rapid prototyping is Advanced Circuit's "Barebones" prototyping service. They spin 2-layer FR-4 boards with no solder mask or silkscreen, but they do it in 1 day.
The PCBs are ugly, but the exposed copper is tremendously useful for RF prototyping. You can easily cut away traces, add copper tape, and solder jumper wires to tune things like antennas and trace inductors/capacitors. They're also dirt cheap.
Awesome man learned a lot from you ❤️
Thank you, I'm glad to hear that!
Excellent primer on PCB design.
I use cuts in the copper pour to intentionally guide the return current paths to separate out power and signal grounds of audio amplifier boards.
I also avoid introducing ground loops when cutting a ground plane perpendicularly to the current flow with a trace (like in your example) by cutting to copper up to one edge and leaving just one return path available past that trace.
You can minimize some of the effects from a break in the ground plane by strapping signals over it as routed triplets (A more relaxed version of a cpwg) and for mixed signal designs guard rings and routed triplets in general can make a world of difference.
Another great and informative video. I'd love to see your strategies for creating multiple supply rails. I'm working out how to best tackle something that starts with a 12V input and needs a pretty clean adjustable 28-32V supply as well as low noise 5V and 3.3V supplies for a transimpedance amplifier and ADC, where the 5V is the TIA supply and the 3.3V is used as the TIA and ADC reference.
I enjoy your video a lot! Always after seeing one of your videos I get instantly highly motivated to start some new PCB design. Thank you!
That's awesome, glad to hear they bring motivation! :D
Phil, this was a great video as always, thank you for taking time to spread knowledge
Thank you very much!
All my PCB designs have been two layer so far so this is invaluable info.
My last PCB worked perfectly using tips and tricks from your various tutorials.
One day I will take the four layer jump...
Very cool, glad everything worked out with your last design!
great video!
Another tip ill suggest, for 2 layer PCBs when possible use 0805 components as they allow you to run up to two signal traces underneath thus minimizing need for vias
Hi Phil! You are an inspiration! Keep it up!You help us learn and grow. Love from India!!
Thank you very much - greetings from Germany :)
Good stuff, beautifull design as always
Thanks a lot, Richard!
Many thanks Phil: always a wealth of information. Greetings.
Thank you, Antonio!
If you keep trace lengths short, then you can just use inductances and capacitances of the traces. If you components have more inductance and capacitance, the the impact is small. But do check values.
if you are dropping board thickness remember also to be aware of the impact that can have on fitment of edge connectors (if present)
20:08 There's some pitfalls with this though! If you aren't careful, there can be two ground planes that are only connected by a sliver, and if these two planes happen to have to carry a lot of energy, you can blow a hole in your board quite easily. The layout software wont alert you of this, as clearly the nets are connected (just not wide enough).
Great point!
Thank you. This is informative.
Glad to hear that, thanks for watching!
You are very talented and smart! Nice video Phil :)
Thank you, William!
thank you for another great video :)
Thanks for watching! :)
Brilliant, thank you! 👏
Thanks for watching!
Awesome, thank you :)
Thanks for watching :)
On the bottom left of the FTDI chip, there are 3 adjacent ground pins. why not use a polygon to connect them to the decoupling cap? and also why not use a direct connection instead of the thermal relief for the ground polygon pour? isn't it better to remove the soldermask on top of the RF section (chip and traces)?
Love your channel and the tips I can steal. Gotta slightly make fun of the solder pasted fiducials though 😅
Thank you! Haha they actually don't have solder paste on them, the picture just gives that appearance.
phil, what component did you place at the RF antenna region? the plane that has no polygon pour? is there some sort of smd antenna? never seen anything like that on esp boards or something.
I started learning KiCAD from one of your videos about laying out an STM32 chip with bluetooth. Fast forward 4 months and I've got a prototype board for my project. I ended up having to pretty heavily populate the back side in order to get everything on an 85x85mm board. Do you have any guidelines or rules of thumb for how much PCB area you should guestimate per chip? Like if I have a 68-pin QFN with an exposed pad, should I plan to have 2 or 3 times it's surface area of room on the PCB when placing components? Should it be the square of it's size?
16:42 what is the logic behind widening a trace again once you've made it thin? I was under the impression that your thinnest point will be the bottleneck
Minimising total inductance and DC resistance.
so, what does 6mm actually represents? is it from chip to first component of the matching circuit? or chip to pcb antenna connection point?
I saw a random JLCpcb (or was it PCBway?) Sponsor section in another vid talking about 'Via in Pad'.
You've done a few videos about BGA fan-out and was wondering about your opinion on this (its not new tech by any stretch, but definitely 'new' at the 'consumer' level). Do these help with BGA fanout, what about implications on inductance etc and the other usual BGA fanout considerations.
Would be interested to see your thoughts.
Great video & usefull tips. may I know how you make the layout colourful such as pin have different colour, it look cool?
In Altium Designer, I assign net colours in the Properties panel after selecting a wire/bus in the schematic. KiCad has a similar option but that's accessed through assigning net classes.
In your video, you advise keeping the traces short compared to trying to do controlled impedance in the RF section. Would this recommendation change if the traces were connecting to an SMA connector instead of a chip antenna?
No, that recommendation generally stays the same.
@@PhilsLab That's surprising to me, but very valuable to know.
Hey Phil, what’s your opinion on a 2-layer PCB with components on both sides BUT with a ground fill on both sides? Sometimes I’ll use stitching vias as an outline or spanning the entire board, or just relying on a couple vias near ground.
At that point I'd move to a 4-layer board.
Is there a link to this PCB? I couldn’t find it anywhere
Would it be possible for you to add the files from this board to your git repository?
Do you happen to know a good book that covers designing High power circuits for power sources and driving Electric Motors?
I'm afraid not for PCB design. There are a few on power electronics in general, but they are rather theoretical and more on the schematic/component-side of things (e.g. Power Electronics by Mohan, Fundamentals of Power Electronics by Erickson).
@@PhilsLab This is definitely a topic that would greatly benefit from a dedicated video 😊
I saw that you made this PCB in march this year. I am also currently designing a 4 layer PCB and do want to order it at PCBWay. Currently they are in the middle of upgrading their stack and I cannot find information of the stackup. Could you provide me any guidance which values I should use? Thanks 🙏🏼
Do you have requirements for a particular build-up? If not, just go with the PCBWay's standard build and choose the appropriate final thickness for your design.
@@PhilsLab I do have impedance controlled traces. Therefore I wanted to check what the layer thickness is for each layer for the standard stack-up. But currently I cannot find it on the PCBWay website.
good information. Now I understand the importance of reference ground.
1. For next video , can you speak little slow ?
2. Second, Can you make a video: have a BAD PCB with few problems like EMI/EMC and please demonstrate how to correct it. (MICROCONTROLLER BASED )
3. if possible consider side effect of inductive load.
Looking forward to the vid on the pcb antennas. I hope the people in the far east watch it too. I have got a few esp32 boards with chip antennas that seem to be so badly matched no wifi gets out, giving a max wifi range of under 1M. :(
Thanks, that's coming soon! Oh wow, that range really isn't great..
@PhilsLab is the design for the RF Schtick available somewhere?
I'm afraid not for the moment. I do plan on open-sourcing that and the BumbleB once I've verified everything.
@@PhilsLab I'd walked into that trap (once). "Hey guys this works really well..." [gets board back] "oh darn it doesn't, my finger caught a via and shorted a track to ground."
I'm a hack, to be sure, it it can happen to the best of us.
Not sure I'd want to take that project on in KiCAD 8 and I wish you'd do demos in something the rest of us can afford mate. I'm keen but I don't have the sort of money Altium wants. Even the low-cost one is prohibitive. I'd have raided the credit card but it doesn't have a SPICE sim and that's the one thing I absolute have to have. External SPICE like LTSpice is handy but that doesn't cover my cockups in schematic capture and the internl SPICE in KiCAD lacks even fairly basic models.
Nice design! Without diving that deep into the design, wouldn't it be easier fir the bigger IC (U1?, left one) was rotated 90°CCW? That way the USB traces would be more direct and it looks like the SPI lines would work fine as well.
Thanks! Yes, I tried that but ended up not making too much of a difference - other than increasing some SPI trace lengths and making the XTAL/external component positions a bit more awkward.
"So to speak." DRINK!
What do you think about aisler?
Only used them once a couple of years ago when they were very new, so I'm afraid I can't really comment on them.
Is power really DC? I mean, doesn't it contains high frequency also during transients (switching events)
Hey whould love it if you can do a video about high current pcb design (15 amps and above)
I would absolutely love this, too.
Yes, will do that in the future!
I love you so much
Haha thank you
Hi sir, I am a 3rd years student and at school I was taught to pour both the top and bottom layers of a 2-layer PCB with GND. However, I saw that you did not pour the top layer at all. Is there any reason for you to not do that? Is it to ensure that there is a definite return path of the current?
The top and bottom layers are poured with GND in this video. In general, I would suggest doing that for 2-layer designs.
@@PhilsLab Thanks you sir!
top pour doesn't have benefits outside of copper balancing the PCB for preventing bending. If you do it wrong (not enough vias) a copper pour can ruin your designs performance
@@tommihommi1 I did for me even on a tiny board! Rick Hartley said it best - we need a return for the fields and that's how I think when I'm routing - not where the signal is (that's obvious) but were does its return path go?
how to build a groovebox from scratch?
👍🙏❤️
MAKE A PROPER FULL ATIUM VIDIO OF 2 LAYER AND 4 LAYER
Hi Phil, there was an old video of you designing a hardware accelerator based on the artix-7 fpga with an m.2 interface, (ua-cam.com/video/8bw80LiCl7g/v-deo.html). could you please provide me the vivado logic design files of the project? I couldn't find them on your github.
Hi Abdul, I'm afraid the design files - other than what's shown in the video - aren't public. Sorry about that!
Abstract:
This transcript provides a detailed guide for designing 2-layer
printed circuit boards (PCBs). It emphasizes cost-effectiveness as a
major advantage while outlining best practices for layer assignment,
component placement, and routing. The guide stresses the importance of
maintaining a solid ground plane on the bottom layer and minimizing
cuts for optimal signal integrity. Strategies for power routing and RF
trace design are discussed, as well as the tradeoffs between 2-layer
and 4-layer PCBs. The information presented serves as a valuable
resource for engineers seeking to optimize their 2-layer PCB designs
for cost, performance, and manufacturability.
*Summary*
- 3:35 Cost-effectiveness: 2 layer PCBs are significantly cheaper
to produce than 4 layer PCBs, especially in high volumes.
- 5:58 Design Constraints: To minimize cost, adhere to manufacturer
design rules for minimum trace widths, hole sizes, etc.
- 8:35 Layer Assignment: Place all components on the top layer and
create a solid ground plane on the bottom layer for a clean
reference.
- 11:27 Component Placement: Prioritize intelligent component
placement to minimize trace lengths and jump requirements.
- 15:10 Routing Order: Route critical traces (USB, SPI) first,
followed by less critical traces. Iterate on placement as needed.
- 15:50 Power Routing: Use wide traces for power where space
allows, narrowing only when necessary to reach component pins.
- 16:51 Minimize Ground Cuts: Keep jumps between layers short to
minimize disruption of the ground plane.
- 22:36 Ground Stitching: When using ground pours on both layers,
add stitching vias to connect them and improve reference.
- 23:08 RF Design: For simple RF systems, keeping trace lengths
short minimizes the need for impedance matching.
- 28:54 2 vs 4 Layer Tradeoffs: 4 layer PCBs offer improved signal
integrity and EMI performance but at a higher cost.
i used gemini 1.5 pro
Low cost Phil? PCBWay ... with assembly in the mix the cost is prohibitive. Maybe not as good as JLC but given the price for small runs... Man.
Shipping Cost to Germany 650$? Seriously?
For 10000 50x50mm PCBs (roughly 100kg).
@@PhilsLab $650 for 1/10th of a tonne is pretty good, esp. if that's air cargo.