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29:26If any one ask bcd of 8 we write as 00001000. Yes msb zero we neglect but still in my point of view this is the best way to codeOutput [7:0] bcdCase(bcd) 8'b00000000: seg=7'0000001; 8'b00000001: seg=7'1001111;
31:24, seg size is 7, therefore seg=7'bxxxxxxx
seven segment display. seg = 7'b 0000001
Yes , that is true.
He needs to change it
In 36:33 alu example- why only 4'bz or 4'b0 while the alu_out is a 8'b register?
Ty
Can i run these codes?..the testbench codes are not provided, right?
If we give values of A and B in decimal in ALU operation while testing using Test bench, it will work or not.
It will work I guess... It will convert that to binary and store in the registers A and B as 8 bit and then will process
is this ppt which used in all the vedios is available?
9:26 count has to be intialised to zero right??
Reset is there for that
In testbench you can start reset before clk so it will initially go to 0
24:52
Input should be [3:0] for a,b
29:26
If any one ask bcd of 8 we write as 00001000. Yes msb zero we neglect but still in my point of view this is the best way to code
Output [7:0] bcd
Case(bcd)
8'b00000000: seg=7'0000001;
8'b00000001: seg=7'1001111;
31:24, seg size is 7, therefore seg=7'bxxxxxxx
seven segment display. seg = 7'b 0000001
Yes , that is true.
He needs to change it
In 36:33 alu example- why only 4'bz or 4'b0 while the alu_out is a 8'b register?
Ty
Can i run these codes?..the testbench codes are not provided, right?
If we give values of A and B in decimal in ALU operation while testing using Test bench, it will work or not.
It will work I guess... It will convert that to binary and store in the registers A and B as 8 bit and then will process
is this ppt which used in all the vedios is available?
9:26 count has to be intialised to zero right??
Reset is there for that
In testbench you can start reset before clk so it will initially go to 0
24:52
Input should be [3:0] for a,b