Testbench Writing || XOR Gate Verilog code || EDA Playground Demo || Getting started

[@felipeguimaraes2568]

Thank you so much! You have saved a Brazilian student!

[@etrixsolutions8126]

Thanks, glad to know that I helped you. Stay connected for more such videos.

[@etrixsolutions8126]

Just wanted to know that how this video can save someone?

[@felipeguimaraes2568]

@@etrixsolutions8126 I'm doing a verilog homework, but my professor's examples wasn't good as yours.
I wasn't understanding how to work with EDA and Verilog.
Now, I'm already finishing my work!
Thanks!

[@etrixsolutions8126]

Check this for more examples.
ua-cam.com/video/fL7wS99BAbw/v-deo.html

[@chandunukala7279]

Thanks you so much sir.. Lot of information u have given for me.. I am from iiit manipur❤❤

[@VishvajeetSingh-hc6og]

Thanks a lot brother,you gave all required stuff which I really searching for.

[@praveennayak6486]

Thank you very much sir .Really have got nice help

[@etrixsolutions8126]

My pleasure.. thanks for the feedback

[@abhishektripathi6655]

informative lecture 👍

[@etrixsolutions8126]

Thanks for liking

[@yashwanthnamburi3824]

thanks sir for the video

[@bobo_for_all]

Nice explanation sir

[@etrixsolutions8126]

Thanks for liking, keep watching.

[@ExploreElectronics]

Good video

[@etrixsolutions8126]

Glad you enjoyed

[@Bu0087]

Sir please upload more videos on verilog and digital electronics and questions too for bca

[@etrixsolutions8126]

Thanks for watching..
Any specific topic you would like to mention..

[@blenderstuff7861]

Thanks a lot sir

[@etrixsolutions8126]

Hope the video helped you to learn something. Stay connected for more such videos.

[@dhananjayalum4416]

how to save the code with particular file name ?

[@etrixsolutions8126]

Once you open a new playground. there is option named share in the lower window. Here you can name your design and save it in the EDA playground data base. you can make it private or publish it. To access that saved design click on the playgrounds tab available at top right corner near the profile tab. in the playgrounds tab you can find all the design saved by you.
hope you got the answer. thanx for watching.

[@dhananjayalum4416]

@@etrixsolutions8126 yaaa tq for ur reply and I resolved my issue 😊

[@jayshreepatra1834]

sir what is that dumpvar s(1) i couldn't get.. that what u said 1arce 0arce.. sir plzz xplain again.

[@etrixsolutions8126]

Hi,
If you are doing the hierarchical design, in which the main module is decomposed in submodules. Then during the simulation if you want to display the signals of only main module then use (1).
Similarly to display the signals of second level hierarchy, use (2). For all level of hierarchy use (0).
Sorry for late response.
Thanks for watching the video.
Please subscribe the channel.

[@63_tanishkgupta55]

behavioral also please