1. Since instruction pipelining may require simultaneous access to both data memory and instructions memory, it is hard for pure von Neumann architecture to achieve that.. But if you cache the instructions and data (thus creating a small "ROM" and "RAM", respectively), then it can be done with von Neumann architecture, though this will be closer to Harvard.. 2. Simple branching and loops should be possible to build with just hardware, transistors. For example, we can implement branching using multiplexer - demultiplexer gates, which physically activates or deactivates different parts of the chip, thus altering the output of the chip; that can be branching... Or take a simple counter, that counts from 0 to 9 and back to 0 with intervals of 1 seconds - it can be the example of loops. No program needed, not even fixed one; a certain way of wiring the hardware parts together in this case is the program itself..
Thank you for the comment! 1. I agree with that one. And my next video will cover cache related info! 2. Actually, transistor weren't present at that time. We are talking about the days of vacuum tubes!
@@BinaBhatt the architectures did not get their name at the time, historically. Naming is hard, so later we took the slightest indicator we could find. Already the Turing machine only has a single tape for “code” and “data”. Von Neumann merely stood up against those managers which wanted to save a few tubes and pennies and let women plug cables for their “program”.
@@ArneChristianRosenfeldtHarvard architecture was invented by IBM, back when Big Blue was cool... They stored their programs on punch cards, writing data back to a punch card wasn't practical.
So you say that no data was supplied on the punch cards? I recall that a lot of computers were wiped clean for the new job, and both code and data had to be supplied "in paper". I don't think that code was ever executed directly from paper. You cannot jump backwards. The reader goes through the stack from start to finish. Some programs kept part of the core memory and overwrote the other part with the next paper stack. And yeah here mostly data was kept in core memory.@@kayakMike1000
Von Neumann architecture was an interesting insight that instructions were just data. The Harvard architecture was invented because IBM just wanted to use punch cards for ROM.
DRAM and SRAM are both used to store the internal state. Data flip flops also. These fabricated bias free ( TTL as a pull up bias, though), to store information as long and with as low energy as possible. So on power on ideally we have random values every where. Power goes through capacitors and comes on slowly. So outputs need to be disabled for some time. While reset is pulled the instruction pointer needs to be pulled to 0 . 6502 is pulled to cycle one of a multi cycle instruction. Then like a crowbar on release it looks up a vector at FFFB or so. Hmm, while the reset pin is pulled, the clock should drive a circular counter which resets all registers on the bus.
1. Since instruction pipelining may require simultaneous access to both data memory and instructions memory, it is hard for pure von Neumann architecture to achieve that.. But if you cache the instructions and data (thus creating a small "ROM" and "RAM", respectively), then it can be done with von Neumann architecture, though this will be closer to Harvard..
2. Simple branching and loops should be possible to build with just hardware, transistors. For example, we can implement branching using multiplexer - demultiplexer gates, which physically activates or deactivates different parts of the chip, thus altering the output of the chip; that can be branching... Or take a simple counter, that counts from 0 to 9 and back to 0 with intervals of 1 seconds - it can be the example of loops. No program needed, not even fixed one; a certain way of wiring the hardware parts together in this case is the program itself..
Thank you for the comment!
1. I agree with that one. And my next video will cover cache related info!
2. Actually, transistor weren't present at that time. We are talking about the days of vacuum tubes!
@@BinaBhatt the architectures did not get their name at the time, historically. Naming is hard, so later we took the slightest indicator we could find. Already the Turing machine only has a single tape for “code” and “data”. Von Neumann merely stood up against those managers which wanted to save a few tubes and pennies and let women plug cables for their “program”.
@@ArneChristianRosenfeldtHarvard architecture was invented by IBM, back when Big Blue was cool... They stored their programs on punch cards, writing data back to a punch card wasn't practical.
So you say that no data was supplied on the punch cards? I recall that a lot of computers were wiped clean for the new job, and both code and data had to be supplied "in paper". I don't think that code was ever executed directly from paper. You cannot jump backwards. The reader goes through the stack from start to finish. Some programs kept part of the core memory and overwrote the other part with the next paper stack. And yeah here mostly data was kept in core memory.@@kayakMike1000
Amazing lecture. Liked it from Pakistan.
Damn good class, it comes with nostalgic university memmories
Great exaplanation ,like from zambia Unza 🙏
quite good video😇,answered alot of questions
Von Neumann architecture was an interesting insight that instructions were just data. The Harvard architecture was invented because IBM just wanted to use punch cards for ROM.
Please add, video about booting process of microcontroller and steps after reset.
DRAM and SRAM are both used to store the internal state. Data flip flops also. These fabricated bias free ( TTL as a pull up bias, though), to store information as long and with as low energy as possible.
So on power on ideally we have random values every where. Power goes through capacitors and comes on slowly. So outputs need to be disabled for some time. While reset is pulled the instruction pointer needs to be pulled to 0 . 6502 is pulled to cycle one of a multi cycle instruction. Then like a crowbar on release it looks up a vector at FFFB or so.
Hmm, while the reset pin is pulled, the clock should drive a circular counter which resets all registers on the bus.
this is really great vid,one of the best on yt
Nice,make more Embedded system video
Thank you very much!
Great video helped a lot before exam.🙏
Really wonderful explanation
Love your videos! Please do upload more!
A great explanation! Thank you!
thanks for clearing doubts🙏🙏
I liked the way your presented this content ..great stuff and thank you.
what is the difference between data ñ instruction 6:13
Clear concise explanation 👍
Thank you for super info vedio mam...can you plz cover vedios on high speed protocols like DDR,PCI protocol..etc..
Thank you
Thank u mam , very well explained
Most welcome!