When it is pass input x=1,present state (10) to next state (11) its output should be 1 and When it is pass x=0, present state (11) to next state (00) its output should be 0. But in there you interchange this two. Also in our university our lecturer also did the same. But i dont know the reason why it is. Could you please explain if there anything i miss or its a mistake of you
the output(y) is moore output which means its a function of present state only so doing this state table of y is not 100% correct we should do a isolated table for y which include A(t) and B(t) only so when its 11 y became 1 the the sol in the video is wrong she builds a mealy diagram and did moore state table
When it is pass input x=1,present state (10) to next state (11) its output should be 1 and
When it is pass x=0, present state (11) to next state (00) its output should be 0.
But in there you interchange this two.
Also in our university our lecturer also did the same.
But i dont know the reason why it is.
Could you please explain if there anything i miss or its a mistake of you
Same thing
Please if you know the correct answer say that
your answer is correct. when 1 comes three times, output will be 1
do you kno w how resolve this problem??
I think you're right, let me wait until tomorrow when I go to class, I will ask my teacher about this part.
the output(y) is moore output which means its a function of present state only so doing this state table of y is not 100% correct we should do a isolated table for y which include A(t) and B(t) only so when its 11 y became 1 the the sol in the video is wrong she builds a mealy diagram and did moore state table
thank you very much
Tha last gate should be AND because there is A.B not A+B
O yesss thanks for correction
what will be the input equations
If you are asking for input equations of flip flop they are mentioned there. Since for a D flip flip whatever the input is transparent at the output.
Nah what is the sequence required to detect?
That Last part is Y=AB
and for Db(second d-flip flop) there is no not gate to take complement of B, so Db is becoming Ax + Bx, and not Ax + B'x
In mealy machine no of bits= number of states then why we take 4 states
state s2 and s3 are the same states with same outputs and final states with same inputs, although its way too late for the answer, ig
this circuit doesn't work for me...anybody simulated it?
Did you implement it on hardware ?
@@eevibessite no, on simulator.
Also its equation not equaions
Thanks dear....actually I make video in a single go so just the slipping of tongue
I was just joking ma'am. By the way video was quite helpful. Thanks a lot