Self-checking testbench in VHDL

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  • Опубліковано 29 гру 2024

КОМЕНТАРІ • 3

  • @mohitsrivastav9350
    @mohitsrivastav9350 3 роки тому

    Hi Jonas. I saw the tutorial videos on basics of VHDL. Do you have couses for professional VHDL coders ? I mean coding practises for high reliability and testability. I am new in this field and i have experienced that rather than spending time on writing test bench.... it is faster to define the code in small modules and then implement them one by one with Integrated Logic analyzer based debugging..... May be i am too confident on my coding but i do want to learn better approaches.... Let me know your thoughts on this..... if you can make a video on this it will be great.... i find many people who take this approach but i am still not sure waht is the correct way...

  • @atharvaksh1168
    @atharvaksh1168 5 років тому +1

    what are u holding?

    • @VHDLwhiz
      @VHDLwhiz  5 років тому +2

      That's a breadboard with a Lattice FPGA and a dot matrix LED display mounted on it. It's the prototype that we create in my next VHDL and FPGA course. I talked about it briefly towards the end of this video.