This is a strange experiment. The Dk (er) is a major part of the formula that calculates the microstrip width for given 50 ohms wave resistance. So, the JLCPCB's calculator for the width of the line was using a known Dk value to give you the width for the design. This Dk (er) is specified on a different page on their website. Then you measure the Dk assuming the line is 50 Ohm? It would not be 50 if the Dk is not what they say it is, and your measurements would then be skewed because of the power reflecting on non-50 Ohm joints, giving you incorrect results.
Impressive content, FesZ Electronics. Looking forward to your next upload! I smashed that thumbs up button on your video. Keep up the fantastic work! The way you explained the impact of dielectric constant and dissipation factor on signal integrity was enlightening. How do you think emerging materials will alter the design considerations for high-frequency circuits in the future?
Is the ripple in the S-parameter attributed to the limited accuracy of the light VNA at high frequencies? Which is the part number of the one you are using? Also is it okay to test the impedance on a different PCB circuit board with the same geometry as the DUT (just not to have the test part on the final PCB)?
I'm using a LiteVNA64 which is rated up to 6.3GHz; but I would say that the ripple has more to do with the trace than the measurement device - because of all the bends, the trace does not have a uniform impedance... Regarding your second point; you can of course have 2 different boards, but the difference between them can be larger because of the technological tolerances of the manufacturer. With both test board and useful board on the same panel, the differences will be much smaller.
@@FesZElectronics When simulating impedance with keysight SI in altium I did not notice any influence from 45deg bends vs curved bends on impedance. I don't think that the trace bends affect the impedance. The material could be non unformily weaved particularily in x vs y axis however.
The filling factor refers to how much of the electric field around a conduct actually goes trough the substrate and sees the higher dielectric constant - for a stripline its 1; but for a microstrip it depends on the substrate thickness.
This is a strange experiment. The Dk (er) is a major part of the formula that calculates the microstrip width for given 50 ohms wave resistance. So, the JLCPCB's calculator for the width of the line was using a known Dk value to give you the width for the design. This Dk (er) is specified on a different page on their website. Then you measure the Dk assuming the line is 50 Ohm? It would not be 50 if the Dk is not what they say it is, and your measurements would then be skewed because of the power reflecting on non-50 Ohm joints, giving you incorrect results.
Love when the high frequency black magic is being explained
Very interesting, Fesz. Thanks!
that was informative, good job
Impressive content, FesZ Electronics. Looking forward to your next upload! I smashed that thumbs up button on your video. Keep up the fantastic work! The way you explained the impact of dielectric constant and dissipation factor on signal integrity was enlightening. How do you think emerging materials will alter the design considerations for high-frequency circuits in the future?
Is the ripple in the S-parameter attributed to the limited accuracy of the light VNA at high frequencies? Which is the part number of the one you are using?
Also is it okay to test the impedance on a different PCB circuit board with the same geometry as the DUT (just not to have the test part on the final PCB)?
I'm using a LiteVNA64 which is rated up to 6.3GHz; but I would say that the ripple has more to do with the trace than the measurement device - because of all the bends, the trace does not have a uniform impedance...
Regarding your second point; you can of course have 2 different boards, but the difference between them can be larger because of the technological tolerances of the manufacturer. With both test board and useful board on the same panel, the differences will be much smaller.
@@FesZElectronics
When simulating impedance with keysight SI in altium I did not notice any influence from 45deg bends vs curved bends on impedance. I don't think that the trace bends affect the impedance. The material could be non unformily weaved particularily in x vs y axis however.
May someone quickly explain what the fillfactor is?
The filling factor refers to how much of the electric field around a conduct actually goes trough the substrate and sees the higher dielectric constant - for a stripline its 1; but for a microstrip it depends on the substrate thickness.
@@FesZElectronics Thank you
I believe Line Calculator in QcusStudio is also useful.
Qucs-S has a lot of usefull tools!
Very nice! But my brain hurts now thinking about all these variables!
I'm surprised that JLCPCB don't allow the facility to include the effect or solder resist on the loss for microstrips.