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  • Опубліковано 5 лют 2025
  • Link of complete series of Static Timing Analysis Interview questions and answers are given below:
    Static timing Analysis Interview questions Part 1
    • Static timing Analysis...
    Static timing Analysis Interview questions Part 2
    • #STA Static Timing Ana...
    Static timing Analysis Interview questions Part 3
    • Static Timing Analysis...
    Static timing Analysis Interview questions Part 4
    • Static Timing Analysis...
    Static timing Analysis Interview questions Part 5
    • Interview Question on ...
    Static timing Analysis Interview questions Part 6
    • Static Timing Analysis...
    Static timing Analysis Interview questions Part 7
    • Electronics Interview ... :
    Static timing Analysis Interview questions Part 8
    • Static Timing Analysis...
    Static timing Analysis Interview questions Part 9
    • Static Timing Analysis...
    Static timing Analysis Interview questions Part 10
    • Static Timing Analysis...
    Static timing Analysis Interview questions Part 11
    • Static Timing Analysis...
    Static timing Analysis Interview questions Part 12
    • Static Timing Analysis...
    ******************************************************************************************************
    Videos promised inside this session are given below:
    ******************************************************************************************************
    Maximum operating frequency formula:
    • How to calculate Maxim...
    #STA #StaticTimingAnalysis

КОМЕНТАРІ • 27

  • @madmax6661
    @madmax6661 3 роки тому

    Excellent video and crystal clear explanation sir, thank you for posting.

  • @dhanabalshanmugam7559
    @dhanabalshanmugam7559 3 роки тому

    Sir, Really great technical vidoes from you! I understood the importance of set_input_delay parameter when we have to do multi-FPGA designs.

  • @ujjwaldebbarman5556
    @ujjwaldebbarman5556 Рік тому +4

    Why u don't consider 6ns (z) in calculation??

    • @i_latebloomer101
      @i_latebloomer101 6 місяців тому

      because 6 ns of inverter at output port is out of scope for setup time analysis ...

  • @akhilgoel2223
    @akhilgoel2223 2 роки тому +1

    Great explanation sir!!

    • @TechnicalBytes
      @TechnicalBytes  2 роки тому

      Thanks , please keep giving your feedback on other videos as well. your likes and dislikes

  • @alvinaug3844
    @alvinaug3844 9 місяців тому

    Here other chip also need to operate at the same frequency right?

  • @harshalthanekar4397
    @harshalthanekar4397 Рік тому

    If in exam the hidden chip is not there then should we consider critical path from 10ns or 7ns>8ns>9ns?

  • @breathemusic5260
    @breathemusic5260 3 роки тому +1

    Sir would like to know the source of your questions...please

  • @manveersinghmehra
    @manveersinghmehra Рік тому +1

    nice

  • @BharatIndiaHindustan628
    @BharatIndiaHindustan628 3 роки тому

    Very nice video sir

    • @TechnicalBytes
      @TechnicalBytes  3 роки тому

      Hello Rohan, Thanks and glad that you liked it.

  • @AbhishekSingh-up4rv
    @AbhishekSingh-up4rv 2 роки тому +1

    ty

  • @MT22ECE002Shubham
    @MT22ECE002Shubham Рік тому +1

    I need one month subscription but there is problem in payment process

  • @apurvaverma3897
    @apurvaverma3897 11 місяців тому

    I tried joining and paid 59 /mon twice but both the time it got failed. help me

    • @TechnicalBytes
      @TechnicalBytes  11 місяців тому

      But I am able to see in list of members, can you please check if you get access members perks

  • @talarikarun
    @talarikarun 3 роки тому

    Sir can you paste link of part -1.

    • @TechnicalBytes
      @TechnicalBytes  3 роки тому

      ua-cam.com/video/8Fi6TNz-Gc8/v-deo.html

    • @TechnicalBytes
      @TechnicalBytes  3 роки тому

      I have pasted complete play list on STA in the end screen.. please go through them

  • @b-digitalb-updated3364
    @b-digitalb-updated3364 Рік тому

    Notes?