@55:03 can we bias the circuit just at the boundary of the triode and saturation regions? I thought our biasing had to be well into the saturation region and away from the triode region..
The condition for saturation you wrote is wrong, actually, for a transistor to be in Sat V_ds=> V_gs-V_th So, Vdd-Id*Rd=> Vdd-Vth --> -Id*Rd=>-Vth --> Id*Rd
It's to make sure the MOS operates in saturation. Remember, all CG, CS & CD stages are to be operated in saturation region if our goal is amplification.
For a MOS to be saturation region, Vds >= Vgs - Vth Vd - Vs >= Vg - Vs - Vth, (Now cancel Vs from both sides) Vd >= Vg - Vth, (Put the value Vs = Vdd, and Vd = Vdd - IdRs) Vdd - IdRs >= Vdd - Vth - IdRs >= -Vth IdRs
Doc says he has not had time to do that. I will advice that with the knowledge you have gathered, get his book on "Fundamentals of Microelectronics" and you will appreciate it better. Electronics 2 will likely cover CASCODE STAGES AND CURRENT MIRRORS, DIFFERENTIAL AMPLIFIERS, OUTPUT STAGES AND POWER AMPLIFIERS etc. These a well covered in the afore-mentioned book.
I dont understand what you say. are we seeing only small signal model? but technically for common gate , input is source right? but as per mosfet model current must flow from drain to source?
Go to lecture 41. Watch the part carefully where the biasing of source follower is discussed. It will be described that mic is shorted to AC gnd so first form of biasing is not used. If we go by your standards its not possible. BTW, We've got AC gnd on drain so we have perfect path from source to drain.
Definitely the best set of electronics lectures that I have seen and that includes those in my education as an EE, 40 years ago.
Courtesy to these lectures. I was able to attempt my OHT of Advanced Electronics today!
Very conceptual and greatly presented.
Thank you very much .... Dr.Razavi
Beautiful Lecture!
Great lecture! Thank you so much for sharing!
Excellent Lecture!
LEGEND OF ELECTRONICS
Excellent sir.......
I believe vgs = 1.13V at 49:30. But still everything is correct after that, just a mistype that Dr. Razavi made.
yes indeed
he corrected it to Vgs = 1.13 at 59:16
In that video above 48 min one problem is solved in that calculation vgs is 1.13V but you put. 0.63V.Please correct me if I am wrong
I'm also getting Vgs to be 1.13V ....
we're you able to solve it later
The next line shows that 0.632=vgs-vth ,that’s should be just a typo
It is just amazing mind blowing
You're amazing sir🙏
@55:03 can we bias the circuit just at the boundary of the triode and saturation regions? I thought our biasing had to be well into the saturation region and away from the triode region..
Another mistake is at 52:40 Rs_max is 870 Ohm. That number is still comparable to 1?g_m though so everything is almost correct
The answer 370 ohms is correct because Vgs is 1.13 V (professor corrected it later at 59:16)
in 55:00 , why I_d * R_d < V_Th
as far as I know , the condition for saturation is V_gs > V_ds - V_Th
The condition for saturation you wrote is wrong, actually, for a transistor to be in Sat V_ds=> V_gs-V_th
So, Vdd-Id*Rd=> Vdd-Vth --> -Id*Rd=>-Vth --> Id*Rd
Yes but you cannot replace Vgs with Vdd since Vdd is to ground and Rs is present. I got Rd=1K
Yeah i got the same doubt
Could anyone please tell me the use of Rf resistor in self-biasing mode? we can also connect a simple short circuit that also does the same work.
@penumalasantharao5690 It is to ensure a signal(ac) gain of > 1 as otherwise input is shorted to output node, ac-wise.
I am a bsc 1 year student. Are the videos good for 1 year student or it requires in depth understanding of the topic
In which you are in doesn't matter at all. Dr. Razavi " guides" well throughout the journey!!
why are you sir using gmRd formula at last when you have degeneration of Rs in last example
Presentation is really nice sir. I have one doubt. In common gate amplifier why we maintain some DC potential at Gate terminal?
It's to make sure the MOS operates in saturation. Remember, all CG, CS & CD stages are to be operated in saturation region if our goal is amplification.
To bias the transistor, imagine you ground the gate, VGS
Thanks sir🙏🙏🙏
how is the IdRd
For a MOS to be saturation region,
Vds >= Vgs - Vth
Vd - Vs >= Vg - Vs - Vth, (Now cancel Vs from both sides)
Vd >= Vg - Vth, (Put the value Vs = Vdd, and Vd = Vdd - IdRs)
Vdd - IdRs >= Vdd - Vth
- IdRs >= -Vth
IdRs
@@rajeshmeher4017
- IdRd >= -Vth
IdRd
special entry:
V Antenna @34:03
Where can I find electronics II lecture series by Behzad Razavi?
They do not exist. Confirmed by a comment on his videos by a person who emailed Dr. Razavi.
Doc says he has not had time to do that. I will advice that with the knowledge you have gathered, get his book on "Fundamentals of Microelectronics" and you will appreciate it better. Electronics 2 will likely cover CASCODE STAGES AND CURRENT MIRRORS, DIFFERENTIAL AMPLIFIERS, OUTPUT STAGES AND POWER AMPLIFIERS etc. These a well covered in the afore-mentioned book.
They exist now. Just look up.
at 39:16. the current from antenna flows into source.But Id is flowing from drain to source? what will happen?
You short out independent voltage sources in small signal model, right ?
I dont understand what you say. are we seeing only small signal model? but technically for common gate , input is source right? but as per mosfet model current must flow from drain to source?
Go to lecture 41. Watch the part carefully where the biasing of source follower is discussed. It will be described that mic is shorted to AC gnd so first form of biasing is not used. If we go by your standards its not possible.
BTW, We've got AC gnd on drain so we have perfect path from source to drain.
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