![Prof.Ashish Tiwari](/img/default-banner.jpg)
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Prof.Ashish Tiwari
India
Приєднався 9 лют 2019
#Subject Lectures #Experimental Study #Research #GATE #PSU #ECE #EE #IN
This channel is aimed to share lectures/info on Electronics and Communication Engineering (ECE) and allied areas (EE,EEE and IN branches).
Dr. Ashish Tiwari received his bachelor's degree in Engineering in Electronics and Telecommunication in 2010, a master's degree in VLSI Design in 2013, and Ph.D. in 2022. Currently, he is working as an Assistant Professor in the Department of Electronics and Telecommunication at G.H. Raisoni College of Engineering & Management, Pune, Maharashtra (India). The majority of his research is in the area of Analog and Digital VLSI design and in Material Modeling. He has published more than 35 research papers in reputed national and International Journals (including SCI, SCIE, and SCOPUS). He has also published 6 patents and 3 book chapters indexed by the Web of Science. He is the Senior Member of IEEE and a Lifetime Member of ISTE.
This channel is aimed to share lectures/info on Electronics and Communication Engineering (ECE) and allied areas (EE,EEE and IN branches).
Dr. Ashish Tiwari received his bachelor's degree in Engineering in Electronics and Telecommunication in 2010, a master's degree in VLSI Design in 2013, and Ph.D. in 2022. Currently, he is working as an Assistant Professor in the Department of Electronics and Telecommunication at G.H. Raisoni College of Engineering & Management, Pune, Maharashtra (India). The majority of his research is in the area of Analog and Digital VLSI design and in Material Modeling. He has published more than 35 research papers in reputed national and International Journals (including SCI, SCIE, and SCOPUS). He has also published 6 patents and 3 book chapters indexed by the Web of Science. He is the Senior Member of IEEE and a Lifetime Member of ISTE.
Відео
How to use Keil for 8051 Simulation
Переглядів 2236 місяців тому
This video provides a basic description of the usage of Keil Microvision software for the simulation of 8051 microcontroller programs.
UNIT 5 | B.Pharm. | Computers as Data Analysis in Preclinical Development
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Subject - Computer applications in Pharmacy Semester - II (B.Pharmacy) University - Chhattisgarh Swami Vivekanand Technical Univesity (CSVTU), Bhilai. Topic - Computers as Data Analysis in Preclinical Development Faculty - Prof. Ashish Tiwari (PhD*, M.tech (VLSI Design), B.E. (Electronics and Telecommunication), Senior Member (IEEE), Life Member (ISTE). In this lecture, the three basic categori...
UNIT 4 | B.Pharm. | Bioinformatics | Computer applications in Pharmacy
Переглядів 10 тис.Рік тому
Subject - Computer applications in Pharmacy Semester - II (B.Pharmacy) University - Chhattisgarh Swami Vivekanand Technical Univesity (CSVTU), Bhilai. Topic - Bioinformatics Faculty - Prof. Ashish Tiwari (PhD*, M.tech (VLSI Design), B.E. (Electronics and Telecommunication), Senior Member (IEEE), Life Member (ISTE). In this lecture, the introduction and basics of bioinformatics is discussed. Dif...
Lecture-33|Microprocessor 8086| Programmable Peripheral Interface - PPI| IC 8255
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Subject - Microprocessor & Interfaces Semester - V (B.Tech, Computer Science and Engineering) University - Chhattisgarh Swami Vivekanand Technical Univesity (CSVTU), Bhilai. Topic - DMA-Direct Memory Access Operation| IC 8257/8237 Faculty - Prof. Ashish Tiwari (PhD*, M.tech (VLSI Design), B.E. (Electronics and Telecommunication), Senior Member (IEEE), Life Member (ISTE). In this lecture, the op...
Lecture-32|Microprocessor 8086|DMA Controller-Direct Memory Access Operation| IC 8257/8237
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Subject - Microprocessor & Interfaces Semester - V (B.Tech, Computer Science and Engineering) University - Chhattisgarh Swami Vivekanand Technical Univesity (CSVTU), Bhilai. Topic - DMA-Direct Memory Access Operation| IC 8257/8237 Faculty - Prof. Ashish Tiwari (PhD*, M.tech (VLSI Design), B.E. (Electronics and Telecommunication), Senior Member (IEEE), Life Member (ISTE). In this lecture, the ba...
Lecture-19|VLSI System Testing| Design for Manufacturability and Boundary Scan (JTAG)
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Lecture-19|VLSI System Testing| Design for Manufacturability and Boundary Scan (JTAG)
Lecture-18|VLSI System Testing|Principles of Logic Verification and Silicon Debug
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Lecture-18|VLSI System Testing|Principles of Logic Verification and Silicon Debug
Lecture-17|VLSI System Testing|Verification (logic-verification), Testing and debugging
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Lecture-17|VLSI System Testing|Verification (logic-verification), Testing and debugging
Lecture-16|VLSI System Testing|Test pattern generation for Sequential Circuits|Built in Self Test
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Lecture-16|VLSI System Testing|Test pattern generation for Sequential Circuits|Built in Self Test
Lecture-15|VLSI System Testing|Test pattern generation for Sequential Circuits|Scan based design
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Lecture-15|VLSI System Testing|Test pattern generation for Sequential Circuits|Scan based design
Lecture-14|VLSI System Testing|Testing of Sequential Circuits|Introduction to Design for Testability
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Lecture-14|VLSI System Testing|Testing of Sequential Circuits|Introduction to Design for Testability
Lecture-13|VLSI System Testing|Automatic Test Pattern Generation (ATPG)|D-Algorithm
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Lecture-13|VLSI System Testing|Automatic Test Pattern Generation (ATPG)|D-Algorithm
Lecture-12|VLSI System Testing|Test Pattern Generation for Combinational Circuits
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Lecture-12|VLSI System Testing|Test Pattern Generation for Combinational Circuits
Lecture-11|VLSI System Testing|Concept of fault modeling for Combinational Circuits|Part-2
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Lecture-11|VLSI System Testing|Concept of fault modeling for Combinational Circuits|Part-2
Lecture-10|VLSI System Testing|Concept of fault modeling for Combinational Circuits|Part-1
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Lecture-10|VLSI System Testing|Concept of fault modeling for Combinational Circuits|Part-1
Lecture-9|VLSI Testing|Observability|Controllability|Repeatability|Survivability|Fault Coverage
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Lecture-9|VLSI Testing|Observability|Controllability|Repeatability|Survivability|Fault Coverage
Lecture -8| VLSI System Testing|Introduction to Testing and Fault Models
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Lecture -8| VLSI System Testing|Introduction to Testing and Fault Models
Lect-7| VLSI System Testing|Design Economics|Non recurring cost| Recurring cost|Fixed cost|Schedule
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Lect-7| VLSI System Testing|Design Economics|Non recurring cost| Recurring cost|Fixed cost|Schedule
Lecture-6| VLSI System Testing| Clock Skew Types
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Lecture-6| VLSI System Testing| Clock Skew Types
Lecture-5| VLSI System Testing| Clock and Clock Skew
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Lecture-5| VLSI System Testing| Clock and Clock Skew
Lecture-4| VLSI System Testing| Power Distribution| Part-2
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Lecture-4| VLSI System Testing| Power Distribution| Part-2
Lecture-3| VLSI System Testing| Power Distribution| Part-1
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Lecture-3| VLSI System Testing| Power Distribution| Part-1
Experiment| Analog Electronics| Output characteristics of common emitter amplifier
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Experiment| Analog Electronics| Output characteristics of common emitter amplifier
Experiment| Analog Electronics| Two Stage RC coupled amplifier
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Experiment| Analog Electronics| Two Stage RC coupled amplifier
Lecture-2|VLSI System Testing|Packaging & Cooling
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Lecture-2|VLSI System Testing|Packaging & Cooling
Lecture-1|VLSI System Testing|An Introduction
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Lecture-1|VLSI System Testing|An Introduction
Lecture-35|Power Electronics|Cycloconverter|3 Phase to 1 Phase, Circulating-Non Circulating type
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Lecture-35|Power Electronics|Cycloconverter|3 Phase to 1 Phase, Circulating-Non Circulating type
Lecture-34|Power Electronics|Cycloconverter|Single Phase to Single Phase: Mid Point & Bridge config.
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Lecture-34|Power Electronics|Cycloconverter|Single Phase to Single Phase: Mid Point & Bridge config.
Lecture-33|Power Electronics|Single Phase Full Wave AC Voltage Controller with R & RL Load
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Lecture-33|Power Electronics|Single Phase Full Wave AC Voltage Controller with R & RL Load
Good explanation🎉
47:05 sir, minimum mode mei toh processor kisi extra ic kp connect nhi krta, right?
8282 aur 8286 dono hi mode me use honge.. bs diff itna hai ki min mode me control signal 86 generate krega..max mode me wo 8288 krega. Min mode ka sirf itna mtlb hai ki processor sirf ek hoga..ICs kitni bhi connected ho skti hain...Kyuki peripherals bhi to IC hi hain na.
Very helpful videos sir Plz keep it up 🙏🙏🙏🙏🙏
Sir thank-you so much for providing these valuable lectures, I can't find a single lectures on UA-cam for balance understanding not to much deep, but your content provides me it's very helpful for my exam, thank you sir
You are welcome
Hi sir
Nice explanation sir 🙏🏻🙏🏻
sir which book is this ??
Great
As usual awesome explanation sir 👏🙂
Thank you Molly
Nice😎😎👍😎😎👍👍👍👍😎
👍☺
Nice sir
Nice
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