Відео

Correct, but the data from the Z80 is valid on the data bus from before the start of IORQ until after the end of IORQ, so for writes at least, it doesn't really matter whether you use the negative edge of IORQ or the positive edge of IORQ.

@@briancampbell179 welcome. Excellent, have a crack at building one. It may also be worth watching the Turing6502 series.

@@DrMattRegan , shall do.

Thank you! Cheers!

Thanks for the feedback. You can certainly use the other half of U8 instead of U15. U15 was initially used allow pixel level control of the border signal, but that's not needed in the final design.

Good to know there's interest out there for PAL. I've had one for PAL on the back-burner for a while, so i might advance it up the schedule.

The 14.318MHz clock has a special reason, it’s 4 times the NTSC sub carrier frequency, and VGA was built on top of the NTSC standard. Trying to get a clock of exactly 14MHz to work is going to be at best problematic, I’d suggest your best option is to replace the crystal.

@@stevetodd7383 Ok, IC, most of zx clones (ex-ussr) has 14 MHz oscillator and 3.5/7.0 Mhz CPU clock. That's why i'm using 14.0. I think, VGA is not so dumb to allow only NTSC -based timings... But who knows :) Will order new crystals and try it out. But. I cannot understand why there is jump to BF80 even if default settings used? Just revert back my settings and still there is BF80 .... Need to investigate the code more carefully.

That odd. All i would do is change HORIZONTALTOTAL to 56 as you,ve done. I'm using the version of the code with the display, i've set HORIZONTALTOTAL to 56 and put the "return val" into the shuffle and deshuffle routines. The sequence I'm getting is 0000->...->001f, 4000..4007, c000, d000...d006, c080, 4011..4017, 2000 which is the correct sequence for the first scanline (c080 is because we have the spectrum mapping for the addresses) Are you using visual studio 2022 and the display version of the code?

@@archarontsm don’t forget that the standard Spectrum runs PAL timings at 50Hz rather than NTSC at 60. It’s a different sub carrier.

@@DrMattRegan That's wierd. It seems, there is a bug in the SimulIDE. Created EPROM, 8-bit data wide. Load BIN. At address 0x1A000 (0xD000 * 2) I can clearly see: 01 D0 02 D0 03 D0 04 D0 05 D0 06 D0 80 C0 C080!!!! But if I switch to 16-bit wide data and load same file, I can see at address 0xD000 this sequence: D001, D002, D003, D004, D005, D006, BF80 .... I don't understand, why there is BF80 instead of C080 ... Bug in viewer? Ok, I've used logic analyzer and there is BF80 on VD bus... bug in EPROM loader, maybe...

Well EPROMs are certainly cheaper than FPGAs (and easier to get and in plentiful supply). FPGAs are really the only way to go for circuits above 10-20 MHz. But from a learning perspective, i think people get a better visceral feel for how a finite state machine works with an EPROM with flipflops rather than from a big case statement in verilog. Really the purpose of this series is to demonstrate a FSM so we can build a Random Access Turing machine in the next series.

A big your welcome from Australia too (sorry, i couldn't resist). Just do it, hand's no learning really helps cement the concepts.

@DrMattRegan ha ha, that explains it now. z80 was not exactly popular in the US. Whereabouts in Australia? I'm in Brisbane

Melbourne, although I did live in the US for 10 years.

Yes, i you are right. We really need to generate a blank front and back porch that is different from the border colour. The ULA must do this to generate the colour burst signal, but it's not well documented.

Enjoy, thanks for the feedback.

Excellent, I've working to get the machine to a point where it's basically octal d-type flipflops, EPROMs and SRAMs. Will still need a shift register and multiplexers for video out, but the bulk of the machine will just be 3 different chip types.

Thanks for that!

Excellent. It's been a fun project.

Thanks for the feedback! Enjoy.

Yeah, it doesn't start out that way but it always seems to end up as a rat's nest.

Enjoy, let me know what you think of it.

Enjoy. I was thinking of just using a 5555 timer, (AND) gating it with flash. This will feed into an exclusive OR gate on the pixel data. I actually simplified U15 in the next video. Originally i wanted to control/shift the timing of the border signal down to one pixel at a time, but it can all be simplified by delaying using HalfCPUClockBar on the flipflop feeding it.

​@@DrMattRegan VSync is asserted on every frame? Then you can use 393 counter to divide it by 4 then another time by 4 (or 8/2) to get one flash toggle per 16 frames. Or something like that. I think this will be much easier than 5555 and for sure more accurate.

Or use INT signal for correct timings alignment with begin frame interrupt

Welcome and enjoy. The B-Roll is tricky, because i was told the Turing6502 series was very "dry", so i tried to lighten it up a bit. If it's any consolation, i've disabled midroll advertisements, so the video clips would normally be ads.

You might like this playlist instead ua-cam.com/play/PLjQDRjQfW-85BWo4IC3WYUDZ-hC8qJsqO.html

Yeah, i'm not a huge fan of dual ported memory, hard to get, expensive etc. I'd rather stick with more vanilla parts, but that's just my preference. I would use them for crossing clock domains though.

@@PaulDriverPlus yeah. I really liked this series.

@@ntal5859 I want all the clocks to be in phase with each other, not just CPUClock and CPUClockbar. That’s the main reason.

Great to hear from you. The ZX80/81 video circuit is the most creative Z80 design I've seen, which is why i decided to do a video series about it. Do you see any glaring errors in the videos?

@@DrMattRegan I was effectively a 'Hardware Design Engineer' on this project, and did not have the knowledge of the tricks which where employed in the software code which made use of the particular features which the Z80 CPU had. This was done by Jim Westwood. So I can't say if you have any errors in your analysis of how it worked. I must say I am very impressed in how you have managed to figure out the relationship of the particular features of the Z80 workings and the generation of the sync signals.

Thanks for the feedback. In the Spectrum series, I've used an EPROM as a finite state machine to do the raster generation which was fun. Now I'm working on a series where i replace both the ULA and Z80 with TTL logic, EPROMs and static RAM. These machines were such wonderful learning tools, and i think there is still some more people can gain from them.

@@DrMattRegan Just before the ZX81 was released in 1981 I left Sinclair Research. In my next job I did a lot of logic design mainly using the CD4000 series of chips. I then got into design using a microprocessor 6502. I did my code in machine code putting HEX values into an EPROM programmer's memory. I would write the code on paper in assembly code. I made use of the timing of each instruction ( microseconds ) and add them together to produce an output pulse from the cpu port of so many micro or milliseconds width. I also tended to use software UARTS , again by counting microsecond cycles of code. No software engineer would be taught this type of stuff today - all high level coding C++ etc. Later I did coding in C language as I was one of a number of Engineers and we all had to work the same way. I also did coding/design for FPGAs ( Altera ) which was used to process digital video and audio streams used in the Broadcast Industry. As I started out as an analogue Engineer in the late 1960s I would also do RF work such as making a transmission line carrying a serial digital video signal ( 3Gpbs ) have a return loss below a certain value.

Wow, sounds like you've has a pretty wide ranging career. I agree, it's a pitty that low level stuff isn't really being taught anymore. I actually think it should possibly be taught at the high school level. Do we really need 2 years of physics and 2 years of chemistry in the final years? Maybe a year of fundamental computer science would be good. BTW: if you're a 6502 fan, i have a couple of playlists. The Turing6502 playlist gets right back to the fundamentals of computing. The SAP6502 is an expansion of the SAP1 architecture to run 6502 code, and i did a separate playlist on the microcode. You may get a kick out of watching them.

@@brianflint133 apologies for not being clearer. I know Clive didn’t really have much technical input. I tried to use the term “Sir Clive’s team”. It’s hard to follow when you introduce too many individual names in a short video. Hopefully MicroMen made it clearer.

@@DrMattRegan I remember the day a meeting was called at Sinclair Research by Sir Clive Sinclair. There may have been around 4 or 5 people present. He told us we were to be making a computer ( The ZX80 ) which would sell for less than £100.

@@brianflint133 Excellent. Thank you for your contribution. How accurate was the MicroMen depiction? I saved money from a paper round to buy a ZX81 (my first computer) and learned BASIC on it. I went on to do a PhD in computer science and designed GPUs at NVIDIA.

@@DrMattRegan The MicroMen depiction is fairly accurate. I will have to watch it again. I joined Sinclair Radionics in 1971 - I worked on a small portable TV ( Black and White with 2 inch screen ) for a number of years. I also got involved in getting Sinclair's first pocket calculator into production - The Executive. The company at this time was based in St Ives in Cambridgeshire. Around 1979 the company spilt up and Sinclair Research was formed and was based in Cambridge City Centre on King's Parade - just opposite to the entrance to Kings College.

How did you go getting it working? Any problems?

@@DrMattRegan Actually it worked first time I was so impressed, Modified it to give composite video output to a Sony monitor, much clearer.

Probably the biggest problem was the keyboard interrupt. I tried using the interupt acknowledgement sequence to cancel the INT signal. I got frustrated and just used the raster generator to limit it to 30 t states and that worked.

@@DrMattRegan oh right.

I just tried this procedure and it works. Under visual studio 2022 (which is free) Create a new project -> Windows Desktop Application Call it VideoFSA Copy the Github version VideoFSA.cpp and VideoFSA.h into the VideoFSA directory. This should replace the existing autogenerated copies of these files. Run.

Exactly. For some reason, i find the Q0/Q8/Q1/Q9... native format of the 27C322 almost impossible to debug. In single stepping mode, i can normally read off the hexadecimal value on the data pins with a logic probe going around a chip. I have to concentrate a lot more and make more mistakes in Q0/Q8/Q1/Q9... format, compared to Q0/Q1/Q2/Q3... format. So it's mainly to make debugging easier. The SwizzleData() function encodes the data before programming such that you can thing of the outputs as being Q0/Q1/Q2/Q3...

Thanks for the feedback, enjoy.

Well spotted. The top flip-flop drives the W-Bus, which is latched on the rising edge of clock1 but the data is presented on the W-Bus while clock2 is high (clock2Bar is low). So the block diagram is correct and it's an error in the schematic.

@@DrMattRegan Thanks for your response. I was leaning this way once I rewatched the first video in the series but to me schematics are the truth because the hardware on my desk derives from it and has gone through a design rule check and through a design process. There are more issues, the reset connection is missing on the lower left D flip flop, and OE on the EEPROM as well.

Yep, you could use a pair of 27C512s

@@DrMattRegan Ah Great! Thank you very much!

Thanks for the feedback, enjoy!

Just haven't gotten around to implementing illegal codes yet www.masswerk.at/6502/6502_instruction_set.html

Yep, these timing issues can be tricky. If i can i get the circuit running at a slow speed but it's not always possible, particularly debugging video circuits.

@@PaulDriverPlus glad you like it.

Yeah, you're right. I could have put the ROM closer to the CPU now that you mention it. During the testing phase i tend to put a dummy image in the ROM to test the raster generator running without the CPU running, but i haven't shown that in the videos.

Glad you enjoyed it

Yeah, I wanted to stick with the spectrum ROM, but when I play the games via the external hardware, it does download the entire 64k into RAM and execute from there.

I guess you could, but it'd be complicated. Assuming you copy with the Z80 itself, you'd have to start in some sort of slower clock mode that paged the ROM in but was still able to write to RAM (possibly with a bigger than 16K ROM so you've got room for the copy program, although the 16/48K Spectrum ROM does have a little free space to fit the copy code in, but since both start at address zero you'd need to relocate when copying). After copying, this code would have to do something like write to an IO port to switch to normal operations. Also the Spectrum ROM and some games incorrectly write to ROM space, so you'd need to write-protect the bottom 16K of RAM after you were done.

In the next project, where i use a TTL CPU instead of the Z80, i'll be writing to the RAM to act as a ROM.

Yep, it’s on the GitHub page as VideoFSA.cpp. Just make a visual studio project and use this file.

​@@DrMattReganOk friend, where can I get the VideoFSA.h library file?

Just added it to github. If you make a visual studio desktop application called VideoFSA and pop these two files in it should work. Let me know either way.

It’s actually surprising how forgiving timing can be though. Usually the ROMs will go faster than their rated speed

@@DrMattRegan Neat.

The problem is that the output from the ROM can be undefined as the address changes. This doesn't matter so much for output enable on the registers, but if you get spurious clocks occurring as the ROM transitions it's outputs, you can corrupt the data stored.

@@DrMattRegan Oh, I see. It does make sense.

Ha ha yes. When ever I feel the need to self flagellate I have a go at getting dynamic RAM to work!

This PCB is already full of multiplexers and buffers. A computer should compute something. So this already is not a home computer, anymore. So we are free to have fun with multiplexers and buffers! The ZX spectrum uses fast page mode. I think it would be really cool to show how fast-page mode and memory interleave go together. For example a memory controller could check if the CPU or videoDMA really needs memory. And then if this is the case, it could read ahead a few bytes and cache them (4 * 2 buffers ). Make this work also for 6502. Make this work for a character display with 16px wide patterns (2 byte burst) or 4 color pixels for games.

If you're interested, i have a video on DRAM usage in the Spectrum ua-cam.com/video/VMosP_X2C8U/v-deo.html

Umm, the trick is using static RAM. It’s faster than the dynamic RAM the production machines use, and it’s easier to use.

@@DrMattRegan have you seen the next?

Enjoy! Don’t forget to look at the SAP6502 series!

Yeah, S8 is meant to be carry bit. Let me have a look at the board.

On the ALU board i have, S8 is connected to pin 9 J2. This signal is driven by a 74hc00 acting as an inverter, which is just to the right of the ALU card on the carrier board. This inverter is driven by the !Carry0 signal from pin 16 of J2 on the status card. On this ALU board i actually have S0-8 are connected to pins 1-9 of J2, but i never used S0-7. I plan to use these same ALU boards in an upcoming SAP68000 and i want fast carry generation so i decided to swap pins 1-8 of J2 to signals i can use with a 74HC182. When I updated the schematic, it looks like i forgot to leave S8 in place. Well spotted, i'll mention it in the next video.

There's quite a good video on it ua-cam.com/video/Uk_QC1eU0Fg/v-deo.html I just wanted to mention it in passing without getting caught in the weeks.

Glad you like them! You might like the Turing6502 series as well.

@@Hellcleaner13 ha ha. Have you had a look at the Turing6502 playlist? No ALU chips! No program counter either!

Thanks David. I like the idea of a transparent design in a transparent case

@@DrMattRegan I see what you did there

@@jecelassumpcaojr890 yes. Version 1 was bit serial, but version 2 used the 181.