I know I'm late to the party, but I have derived a lot of value from this series for my project of building a real time, cycle accurate TTL 6502. I've been going over the internal workings and there were some things that just didn't make sense. Now they do. Thankyou. I'm already going through your library.
@@briancampbell179 excellent, glad you got some value from it. One of the main reasons I did this series was to help people who want to build their own CPU. Let us know how your build goes.
The BIT instructions allows nondestructive (not altering A, X, Y and the memory location) reading of the upper 2 bits of any memory location, even inside rotate and adding/subtracting using Carry bit (which is unaffected by the operation). Lots of Apple II hardware design purposely attached single bit data to only BIT 7 for that reason. BIT 6 could be used the same with overflow V bit, but was apparently less popular.
I'm just a surprised they dedicated hardware to it. It's a pain in rear to implement and it doesn't really match other instructions. Seems like the odd one out.
I often use bit to test two flags at once, but it doesn't save that much, but is worth it as you can store two bits at once. The handy bit is when you use N first, then V second as you can have done some work in between as most instructions leave the V flag unchanged.
@@DrMattRegan I owe you an apology, I thought that I had watched your series, but now realise that I hadn't! I've started and am up to 8! I am off to look at the 6502 instruction decode table vs your microcode. Most of the undocumented/illegal opcodes only work because the chip is nmos but do get used by some sprite routines that I have seen as well as other tight loops. For my code, I avoid them as I want mine to run on the 65c...02 (BBC Master) too. I had never really thought how microcoded CPUs worked, especially the ones with programmable microcode. Great videos, they must have taken ages to put together :)
Enjoy. It's been a bit of labour of love putting this together. There are quite a few TTL CPU projects on YT, but everyone seems to skip over writing the microcode which is about half the effort.
@@Jimbaloidatronin Apple II generally doesn’t use the PIO chips (except for sound etc). The vic20 and C64 use them extensively, so that’s where I’ll test it.
I'm struggling to reconcile the hardware video #8 @19:25 (detailing that /SBC (control bit 35) is needed for the overflow detect circuit) with the uCode generation (@7:16), which doesn't appear to assert /SBC - I'd think it should be set in ExecuteSBC() in the same step that asserts UPDATEV(?). As demonstrated, the emulation correctly set/clear the V flag during subtract instructions, but I suspect running code in the SAP6502 hardware wouldn't. Or am I missing something?
Looks like i hadn't uploaded the latest version of the code to GitHub. There is now a CPU_V3.cpp which does assert SBC in ProgramSBC() (which was ExecuteSBC()). Well spotted.
I know I'm late to the party, but I have derived a lot of value from this series for my project of building a real time, cycle accurate TTL 6502. I've been going over the internal workings and there were some things that just didn't make sense. Now they do.
Thankyou. I'm already going through your library.
@@briancampbell179 excellent, glad you got some value from it. One of the main reasons I did this series was to help people who want to build their own CPU. Let us know how your build goes.
@@DrMattRegan , I certainly will.
Fantastic series on Microcode!!!
Glad you think so! Enjoy!
The BIT instructions allows nondestructive (not altering A, X, Y and the memory location) reading of the upper 2 bits of any memory location, even inside rotate and adding/subtracting using Carry bit (which is unaffected by the operation). Lots of Apple II hardware design purposely attached single bit data to only BIT 7 for that reason. BIT 6 could be used the same with overflow V bit, but was apparently less popular.
I'm just a surprised they dedicated hardware to it. It's a pain in rear to implement and it doesn't really match other instructions. Seems like the odd one out.
I often use bit to test two flags at once, but it doesn't save that much, but is worth it as you can store two bits at once.
The handy bit is when you use N first, then V second as you can have done some work in between as most instructions leave the V flag unchanged.
Interesting. They were pretty tight with their instructions set, so it must have been wanted by the customers or effectively free to deliver.
@@DrMattRegan I owe you an apology, I thought that I had watched your series, but now realise that I hadn't!
I've started and am up to 8!
I am off to look at the 6502 instruction decode table vs your microcode.
Most of the undocumented/illegal opcodes only work because the chip is nmos but do get used by some sprite routines that I have seen as well as other tight loops. For my code, I avoid them as I want mine to run on the 65c...02 (BBC Master) too.
I had never really thought how microcoded CPUs worked, especially the ones with programmable microcode.
Great videos, they must have taken ages to put together :)
Enjoy. It's been a bit of labour of love putting this together. There are quite a few TTL CPU projects on YT, but everyone seems to skip over writing the microcode which is about half the effort.
@@DrMattRegan It would appear there's some utility in checking IRQ bits of the MCS6520 PIA chip.
@@Jimbaloidatronin Apple II generally doesn’t use the PIO chips (except for sound etc). The vic20 and C64 use them extensively, so that’s where I’ll test it.
I'm struggling to reconcile the hardware video #8 @19:25 (detailing that /SBC (control bit 35) is needed for the overflow detect circuit) with the uCode generation (@7:16), which doesn't appear to assert /SBC - I'd think it should be set in ExecuteSBC() in the same step that asserts UPDATEV(?). As demonstrated, the emulation correctly set/clear the V flag during subtract instructions, but I suspect running code in the SAP6502 hardware wouldn't. Or am I missing something?
Looks like i hadn't uploaded the latest version of the code to GitHub. There is now a CPU_V3.cpp which does assert SBC in ProgramSBC() (which was ExecuteSBC()). Well spotted.
This was an awesome series. Kinda sad to see it end. Break handling within the interrupt service routine was always a PITA in the 6502.
Glad you enjoyed it! I have some different CPUs in the pipeline.
Спасибо.
Thanks
Or a massive lie
??? tell me about the amateur radio operates that lessened in whey it happened
Haha, don't think i'm going to get into that.