Designing a 4 Layer PCB Stackup With 50 Ohm Impedance | Signal Integrity
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- Опубліковано 11 чер 2024
- Even low layer count PCBs might need 50 Ohm impedance. If you’re routing with 50 Ohm impedance and you need to design a 4-layer stackup, read our guide to see some standard constructions and PCB trace widths that will give 50 Ohm impedance.
0:00 Intro
0:34 A Few Considerations When Designing a PCB
1:00 Online Calculators Aren't That Bad
1:30 What Influences Trace Width?
2:30 Start with Your Fabricator...or else!
3:20 The Parameters that Determine Impedance
4:29 Trace Impedance Formulas
6:13 The IPC-2141 Formula
6:28 Wadell's Trace Impedance Formula
7:10 How to Determine Your Trace Impedance
9:54 Why Try CircuitMaker?
10:17 Outro
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Thank you Zach. Becoming a better Engineer everyday. Love and respect from India🙏
I love your way of explaining concepts
Awesome!, great video! And thanks for the tip of the book! You should definitely do more videos like these, they are very helpful.
Thank you for providing the knowledge. It clears a lot of doubts.
So nice of you
I'm recently starting to watch your videos...more informative..thank you. 🤩🤩
Glad you like them!
Thanks a lot for your amazing videos
So nice of you
I haven't checked on my fabricator today yet! 😄
Can anyone tell me how to determine what impedance you need for a specific trace? Knowing how to calculate the impedance of a trace is all well and good, but it does not give a good reason as to why. I can understand impedance matching analog and RF traces, but what about power traces and FET control traces?
Hey James, great question. First things first, impedance control is needed on certain digital buses operating at high speed. For example, USB, DDR, LVDS, Serdes channels, HDMI, they all have an impedance standard that is implemented in transmitter/receiver components that are used in these buses, or in interfaces that are implemented in processors. Digital signals only interact with high impedances that are terminated at some target impedance to suppress reflection. So, you have to understand how to design traces to match those impedance requirements. For things like FET control traces (I'm assuming these are gate connections) or configuration traces on integrated circuits, you're generally connecting to a high-impedance input that will not draw appreciable current, so impedance matching is not needed on these connections. On some other type of circuit like an intermediate impedance load, impedance matching is intended for power delivery and is the domain of analog electronics.
I Zach, great video. Thanks a lot for sharing. I have a doubt about the following: what happens if the GND layer(L3) is on the third layer and not on the L2 ? What DK should I consider? I have a 6 layer board with a G-CPW between top and L3 (GND). The PCB manufacturer told me to have 50ohm the trace width it's 0.44 instead of 0.4 mm calculated by me with txLine tool . Who is master here in this requirements : i mean do I have to force them in having dk constant between L1 and L3 or do I have to trust them in their calculus?
You can place GND on L3 and for your application (RF design) this can be common. The Dk value might not be so clear if you have two different materials for the intervening layers. A simple approximation is a weighted average between the Dkeff on the top layer and Dk on the mid layer dielectric, but that is a very rough approximation. I've done a similar design many times with a substrate integrated waveguide and edge emitter with the structure spanning L1 to L4 (no GND in the waveguide region on L2 and L3). The reason for the additional width is probably for etch compensation and they might be using a more accurate tool like a field solver to figure out the additional width requirement from the mid layer dielectric. They won't know for sure until they measure.
@@Zachariah-Peterson thks for reply...i will design always GND on the L2 so that I'm quite sure dielectric is constant...the problem is sometimes with the PCB height as constraint I get track width which is not always feasible on the manufacturer....another important aspect to understand for me is , how much is important to respect the characteristic impedence (and so having a uniform dielectric) in function of the track length? I mean if I have 1cm of 50 ohm antenna (LTE and GPS) do i really to worry about this aspects ? How can I manage the CPW antenna parameters (w,s,Dk,H) even if they are not the suitable one in order to not mismatch the antenna ?
@rombodituono174 You mentioned "characteristic impedance as a function of track length"... The characteristic impedance does not depend on the track length. Only the input impedance will depend on the track length, and this will only happen if the load impedance is different from the characteristic impedance. If you look at the S-11 data for your antenna, you will see the frequencies where the antenna will be well-matched to some standard impedance value (normally cited as 50 Ohms for an antenna). For antenna modules, the S-11 data should be available in the datasheet. Note that the S-11 data will not depend on track length because it is not determined by attaching the component to a mismatched transmission line. If you had a mismatched transmission line, suppose it was 1 cm, whether this will cause the input impedance to differ significantly from the load impedance depends on the frequencies you are driving into the antenna. If the wavelength on the transmission line is much longer than the length then the input impedance will be approximately equal to the load impedance.
So what you're saying is that we don't need to break out the smith chart?
I detest Smith charts LOL
@@Zachariah-Peterson haha same
Thank you Zach. But I have doubts. Why you do not mention track length? it is not important.
If you are just looking at the impedance of a trace then its length does not have any effect on the characteristic impedance. The stackup determines the characteristic impednace of a trace, so when we refer to a 50 Ohm trace, we are referring to the characteristic impedance only. The track length only matters for impedance when we look at the input impedance for a load that does not match the trace's characteristic impedance. Input impedance is only sometimes equal to the characteristic impedance. We have another video about characteristic impeadnce for transmission lines that you can watch here: ua-cam.com/video/Fw0e-TFYArk/v-deo.html
Why 50 ohms?
Sorry I missed this question, but it is totally valid! 50 Ohms is a totally arbitrary impedance to use a target system impedance, but the industry has settled on it so we all have to use it. The reason 50 Ohms impedance is used as a standard for modern digital and RF systems has to do with early RF component engineering. Many decades ago, it was found that PTFE-filled coaxial waveguides exhibited power handling and attenuation that were functions of the waveguide's characteristic impedance. It was found that maximum power handling could be observed when the cable impedance was about 30 Ohms, and the minimum loss appeared to occur when the cable impedance was about 77 Ohms. 50 Ohms just happens to be an approximate midpoint between these two values, so we can see it as a value that balances low loss wave propagation with high power transfer.