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Some quick FAQ! Please like so it stays on top! Q: Why not have NOP be “ADD r0 r0 r0” and save an opcode? You can absolutely do that! That’s called a pseudo instruction. In this series I chose to give NOP its own instruction for simplicity. Q: Why not have the LDI operands flipped so that Reg C can be the destination, saving a mux? This is perfectly valid too! I should have mentioned in the video that having LDI write to Reg A will actually save us from building hardware later on in this series, once more instructions come in.
As a cs student, i wish you did this series 2 years ago. The visualistion minecraft provides to this abstract topic is crazy helpful. They should show this in universities! Great work ❤
As someone that loves to write my own computers (in C, not in Minecraft), i can say that this is easily the best series to watch if you want to understand how computers work.
I recently got inspired to create my own computer, both in Minecraft and IRL, on breadboards! I've also seen the Computerraria project, so maybe it's possible to make an entire RISC-V computer in... Minecraft...? Maybeee...? Can we run Linux on it...? (requires the RV32IMA instruction set) Also, why did you make LDI have argument A as the register? If it was LDI val reg then there wouldn't be a need for an additional mux and control line... I guess that was for some more future instructions, but right now it wasn't necessary.
@@ggorg0 You’re right, it is becuase of future instructions. Probably should have said that in the video! It’s actually gonna enable us to save a mux later.
So about the RISC V, isnt it a very complex isa? I dont even know if a minecraft computer can be so complex lol. However, maybe a custom isa which is a subset of RISC V could be done? Then we could make a custom subset of C specifically tailored for it with a custom compiler that compiles this for minecraft lmao
@@iwikal Complexity is relative, of course it's simple compared to x86, but in the interest of Minecraft computers it's still very complex. RISC-V is designed for a 32 bit computer, so yeah, too complex at least for what I have seen done in Minecraft
The branch memory thing from 5:02 can be explained like this: The before side is all 10 bits forming a list of 1024 address locations, and when you select one the input notifies all 1024 of them with the input selection. Then the correct associated address location will output what it has stored in memory while the other addresses don’t because their address did not match the input. Imagine you had a stack of 1024 pages and you needed to find what was written on a specific page, you’d have to look through all the pages until you found the right one. The after side is instead 16 (4bits) “separate” memory units each having 64 address locations (6bits). When you put a 10 bit input into the overall system, it checks the first 4 bits to know which one of the 16 sub-units to check, then uses the remaining 6 bits to know which address of that unit to use. It’s like if you needed to find that one page in 1024, except this time they are separated into 16 books with 64 pages in each. It’s much easier to search through 64 pages than 1024, and you just need to find the correct book first. Now instead of sending the input address signal to over 1000 registers, it sends it to a 4bit selector that then sends it to 64 registers. Significantly fewer redstone updates.
@@ringo2872 break da rules, rules are there to break them, MAKE IMAGINARY AND NEGATIVE MASS, NEGATIVE AND IMAGINARY LIGHT, NEGATIVE AND IMAGINARY ENERGY NEGATIVE AND IMAGINARY SPEED, SPEED FASTER THAN THE SPEED OF LIGHT OR EXPENDING OF THE UNIVERSE 😈
I thought was a good idea to use the instruction "nop" as a synonimous for "add r0 r0 r0" or something like that to save the opcode for other instruction, except if you want to have a specific instruction wich takes less cycles to execute. I'm liking your series so much!
This is something that's actually done in some cases. The one I can think of is the Raspberry Pi Pico, which is a microcontroller that has something called PIO, which to not go into too many details is like a very small computer that handles IO operations, and is programmed with 16 bit instructions as well, with 3 for the opcode (yes, it only has 8 instructions). It's so crammed that even though a nop was needed, it didn't fit, so it's an alias for mov y, y, or load the value of the y register into the y register, which does nothing. Man, I love that piece of technology.
funilly enough ive been following this series in logisim which is contrary to what you said in the first episode, but compared to all the other resources I've looked at, this series has been the best by a large margin.
I wondered all the time why I didn't get your videos in the notification bell, and now I realized that I wasn't even subscribed to you! Either I was too dumb to subscribe earlier, or I got unsubscribed by a bug (has happened before)… Anyway, I corrected that now.
11:17 why, instead of using another multiplexer, we don't just make Reg A and B the Immediate, and Reg C the destination ? this way, we don't even need another mux
When ever someone tells u minecraft is a kids game & adults are not to play in a kids game. I think of how many complex redstone things there are like this, & u even explain part of how this can do any basic game not only tetris
Why not share load immediate and NOP? if you try to load immediate into 0 register the result will be NOP. So load immediate could be 0000 while all zeros are still nop.
@@ShadowTheAge Yep, there are many ways to simulate NOP. “ADD rX rX r0” works too. I chose to give NOP its own instruction because I would rather not get into pseudo instructions yet, but they will be talked about later
6:25 you may think that's good but it would be much less glitchy to have the 0 instruction to be halt. That way it would detect when it finishes if you forget to put the halt opetation.
for the machine code file, shouldnt you create binary like \x10\x89 \x30\x91 \xb9\x02 (this is hexadecimal but i only used it to compress the binary as its long) instead of using plain text? theres nothing wrong, but its more fitting and more importantly it saves space to store the instructions
IDK if someone brought it up, but wouldn’t NOP actually be be wrong if flood carry is 1 on the ALU. It would give all bits on instead of off So flood carry has to be zero, I think? A few of the other ones too. Like !A and !B and carry in may also causes problems 11:16
@@redstoniker6424 enable is off but that only turns off the register file making A and B in the ALU zero But the ALU itself is still on. When the inputs of A and B are zero, but those modifications are 1 it still has an non-zero output.
List of replacements to nop: LDI r0 0 LOD r0 r0 ADD r0 r0 r0 (changes flags) SUB r0 r0 r0 (changes flags) ADI r0 0 (changes flags) JMP [next instruction] XOR r0 r0 r0 (changes flags) BRH C [next instruction] RSH r0 r0 (I wish this instruction allowed for r shifting more than once a time 😢; doesn't change flags tho)
I feel dead inside, I’m making this on bedrock and I haven’t downloaded any fabric mods so I’ve been doing this by hand. I think it’s time to finally download some mods
Hey, I'm build along with the series at home and really enjoying it. I'm having a bit of trouble with the assembler, when I input a program as ADD r1 r1 r2 XOR r1 r2 r3 RSH r2 r2 that should become 0010 0001 0001 0010 0110 0001 0010 0011 1111 0010 0000 0010 but insted I get something along the lines of 0001 0010 0010 0001 0010 0011 0110 0001 0000 0010 0111 0010 These are the right program just in the wrong order, they go B C OP A or r1 r2 ADD r1 r2 r3 XOR r1 r2 RSH r2 I really don't know what the problem is and could use some help with it Also when I paste the schem in I get a lot of random repeaters just floading around.
Pls, can you give me a trick to build decoders faster without modes. I just spend like, an hour to build a huge 8bit decoder to finally realize that I can’t use it, it’s to tight. I can’t just use a structure block, because every possibility’s has their own code. Pls give me a trick
The instructions set seems to be a little bit rushed, lack some experience/oversight. For simplicity I would rename regA in opcodes as the destination register, but it would make a lot of changes in the math open codes. So it may be too late for such change, in that CPU implementation. I would have used a pseudo opcode for NOP but that is addressed in the authors top comments. Instead I would have used the 0 opcode to implement a interups. It is a nice trick since usually memory is usually zeroed, and hitting non initialized data triggers and interrupt, such is "better" than silently continuing. That said it is fine. Learning is also making errors and reflecting on the mistakes from us and others, and making tradeoffs. That series taught me the reason for the r0 being hardwired to 0 that puzzled me for years in some CPU designs, and I'm grateful for that.
Not at the moment, we need a program counter, jump instructions, enough instruction memory, a graphical display, keyboard or mouse input (which requires some sort of interrupts or simple polling), a C compiler that uses our custom instructions, then just MAYBE we will be able to run doom (or at least a custom version built from the ground up), ALSO we probably need some RAM too.
That’s a completely different field of redstone, I’ve done lots of digital logic with redstone and I am unable to make piston doors bigger than a 2 x 2. Well, there’s still time to learn I guess?
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You’ll also get 20% off an annual premium subscription.
Ok 👍
He c
I still eat bats and monkeys
Some quick FAQ! Please like so it stays on top!
Q: Why not have NOP be “ADD r0 r0 r0” and save an opcode?
You can absolutely do that! That’s called a pseudo instruction. In this series I chose to give NOP its own instruction for simplicity.
Q: Why not have the LDI operands flipped so that Reg C can be the destination, saving a mux?
This is perfectly valid too! I should have mentioned in the video that having LDI write to Reg A will actually save us from building hardware later on in this series, once more instructions come in.
Why couldn't you have just added this to the bottom of the brilliant comment?
when you try to have 2 pinned comments
@@mattbatwings The Pinned comment could have the brilliant ad at the top of the comment and the FAQ below
-LIKE THIS TEXT HERE.
why would "ADD r0 r0 r0" make no operation? wouldn't it double what's currently in r0? or am I misunderstanding something
@@Arae_1 r0 is forced to be read as zero and writing to it is just ignored.
As a cs student, i wish you did this series 2 years ago. The visualistion minecraft provides to this abstract topic is crazy helpful. They should show this in universities! Great work ❤
This is really coming together
i was *JUST* making the redstone computer, and i *JUST* needed this video, and it *JUST* appeared an hour ago. Wow!
As someone that loves to write my own computers (in C, not in Minecraft), i can say that this is easily the best series to watch if you want to understand how computers work.
I recently got inspired to create my own computer, both in Minecraft and IRL, on breadboards! I've also seen the Computerraria project, so maybe it's possible to make an entire RISC-V computer in... Minecraft...? Maybeee...? Can we run Linux on it...? (requires the RV32IMA instruction set)
Also, why did you make LDI have argument A as the register? If it was LDI val reg then there wouldn't be a need for an additional mux and control line... I guess that was for some more future instructions, but right now it wasn't necessary.
@@ggorg0 You’re right, it is becuase of future instructions. Probably should have said that in the video! It’s actually gonna enable us to save a mux later.
So about the RISC V, isnt it a very complex isa? I dont even know if a minecraft computer can be so complex lol. However, maybe a custom isa which is a subset of RISC V could be done? Then we could make a custom subset of C specifically tailored for it with a custom compiler that compiles this for minecraft lmao
@@d4rkmn643no, had it been a complex isa, it would have been called CISC-V
@@iwikal Complexity is relative, of course it's simple compared to x86, but in the interest of Minecraft computers it's still very complex. RISC-V is designed for a 32 bit computer, so yeah, too complex at least for what I have seen done in Minecraft
it somehow feels weird to me hearing memory addresses and bits being refered to in decimal. I guess ben eater has me too used to hex
The branch memory thing from 5:02 can be explained like this:
The before side is all 10 bits forming a list of 1024 address locations, and when you select one the input notifies all 1024 of them with the input selection. Then the correct associated address location will output what it has stored in memory while the other addresses don’t because their address did not match the input. Imagine you had a stack of 1024 pages and you needed to find what was written on a specific page, you’d have to look through all the pages until you found the right one.
The after side is instead 16 (4bits) “separate” memory units each having 64 address locations (6bits). When you put a 10 bit input into the overall system, it checks the first 4 bits to know which one of the 16 sub-units to check, then uses the remaining 6 bits to know which address of that unit to use. It’s like if you needed to find that one page in 1024, except this time they are separated into 16 books with 64 pages in each. It’s much easier to search through 64 pages than 1024, and you just need to find the correct book first. Now instead of sending the input address signal to over 1000 registers, it sends it to a 4bit selector that then sends it to 64 registers. Significantly fewer redstone updates.
Had to click in a micromilipikosecond I got the notification
Bro you violated a rule ! That's wrong to use more than 1 prefix.
@@raffayirfan who said
Math can break everything, so break physics
You should do it in 1 plank second!
@@ringo2872 break da rules, rules are there to break them, MAKE IMAGINARY AND NEGATIVE MASS, NEGATIVE AND IMAGINARY LIGHT, NEGATIVE AND IMAGINARY ENERGY
NEGATIVE AND IMAGINARY SPEED, SPEED FASTER THAN THE SPEED OF LIGHT OR EXPENDING OF THE UNIVERSE 😈
Good job on the series, keep it up.
These videos are very neatly made
I thought was a good idea to use the instruction "nop" as a synonimous for "add r0 r0 r0" or something like that to save the opcode for other instruction, except if you want to have a specific instruction wich takes less cycles to execute. I'm liking your series so much!
True, any ALU instruction that writes to r0 will work just fine!
This is something that's actually done in some cases. The one I can think of is the Raspberry Pi Pico, which is a microcontroller that has something called PIO, which to not go into too many details is like a very small computer that handles IO operations, and is programmed with 16 bit instructions as well, with 3 for the opcode (yes, it only has 8 instructions). It's so crammed that even though a nop was needed, it didn't fit, so it's an alias for mov y, y, or load the value of the y register into the y register, which does nothing.
Man, I love that piece of technology.
I like this series
funilly enough ive been following this series in logisim which is contrary to what you said in the first episode, but compared to all the other resources I've looked at, this series has been the best by a large margin.
new mattbatwings vid? hell yeah
I wondered all the time why I didn't get your videos in the notification bell, and now I realized that I wasn't even subscribed to you! Either I was too dumb to subscribe earlier, or I got unsubscribed by a bug (has happened before)…
Anyway, I corrected that now.
11:17 why, instead of using another multiplexer, we don't just make Reg A and B the Immediate, and Reg C the destination ? this way, we don't even need another mux
he answered in another comment, basically it will make some future instructions easier and actually saves a mux
When ever someone tells u minecraft is a kids game & adults are not to play in a kids game. I think of how many complex redstone things there are like this, & u even explain part of how this can do any basic game not only tetris
Would love to see a chonkin behemoth von neumann architecture system... Chonking cause I'm assuming you'd need a mega memory. xD
It feels natural to make a programming language for this
Harvard architecture this way is _luts on luts on luts._
Redstone Andy's are allways so fucking crazy
Next thing you will do is a quantum computer.
I wasn’t expecting that smooth transition at the end 😂
brilliant is back
Why not share load immediate and NOP? if you try to load immediate into 0 register the result will be NOP. So load immediate could be 0000 while all zeros are still nop.
@@ShadowTheAge Yep, there are many ways to simulate NOP. “ADD rX rX r0” works too. I chose to give NOP its own instruction because I would rather not get into pseudo instructions yet, but they will be talked about later
6:25 you may think that's good but it would be much less glitchy to have the 0 instruction to be halt. That way it would detect when it finishes if you forget to put the halt opetation.
İ love this series so much❤
OMAGA NEW VID
for the machine code file, shouldnt you create binary like \x10\x89 \x30\x91 \xb9\x02 (this is hexadecimal but i only used it to compress the binary as its long) instead of using plain text? theres nothing wrong, but its more fitting and more importantly it saves space to store the instructions
NEED MORE NOW LOL
IDK if someone brought it up, but wouldn’t NOP actually be be wrong if flood carry is 1 on the ALU.
It would give all bits on instead of off
So flood carry has to be zero, I think?
A few of the other ones too. Like !A and !B and carry in may also causes problems 11:16
But enable is off, so it wont cause any problems
@@redstoniker6424
enable is off but that only turns off the register file making A and B in the ALU zero
But the ALU itself is still on. When the inputs of A and B are zero, but those modifications are 1 it still has an non-zero output.
so how much can i bet on the next component being the.. program counter?
NEW VIDEO WOOHOO
Great video, one question tho.
What editing software do you use to make those simple animations?
List of replacements to nop:
LDI r0 0
LOD r0 r0
ADD r0 r0 r0 (changes flags)
SUB r0 r0 r0 (changes flags)
ADI r0 0 (changes flags)
JMP [next instruction]
XOR r0 r0 r0 (changes flags)
BRH C [next instruction]
RSH r0 r0 (I wish this instruction allowed for r shifting more than once a time 😢; doesn't change flags tho)
i love you matt ngl, do you have any tutorials from ground up? because im so stupid i cant make a 3x3 door, i would apreeciate it if you would answer
I feel dead inside, I’m making this on bedrock and I haven’t downloaded any fabric mods so I’ve been doing this by hand. I think it’s time to finally download some mods
please dont change the instruction set too much im already making a programming language for this 😭😭
Can you make the programme counter tutorial next, so we can use the computer automatically
5:04 "The moment I realized the weakness of my own PC... It disgusted me"
I have completely lost the ability to follow and understand this series, but Im still watching
Oh cool. Wait, couldn't you swap the order of the register and the value on the assembler?
Why make an alu capable to do ADD SUB AND NAND OR NOR XOR XNOR RSH and make control rom just for ADD SUB NOR AND XOR RSH ?
We only use 6 operations but with the controls, it's possible for all those other operations
@mattbatwings Just curious, are you planning on making a high-level language (and a compiler for it) for your assembly language?
No
when we making the GPU i realy want to see someone make that architecture in minecraft
So you're making a Harvard architecture.
Have there been Von Neumann architectures in Minecraft?
I’m predicting a sponsor from Brilliant
man you should start a kind of tech company with your redstone knowladge
Now how's that going to work Mami?
Can someone explain to me the point of having NOP, when all it does is nothing? What purpose does it serve? is it simply filler for it to skip?
Next thing write a C compiler for your Minecraft assembly
How hard would it be to add a write to memory [imidiate] instruction
keep going
Hey, I'm build along with the series at home and really enjoying it. I'm having a bit of trouble with the assembler, when I input a program as
ADD r1 r1 r2
XOR r1 r2 r3
RSH r2 r2
that should become
0010 0001 0001 0010
0110 0001 0010 0011
1111 0010 0000 0010
but insted I get something along the lines of
0001 0010 0010 0001
0010 0011 0110 0001
0000 0010 0111 0010
These are the right program just in the wrong order, they go
B C OP A
or
r1 r2 ADD r1
r2 r3 XOR r1
r2 RSH r2
I really don't know what the problem is and could use some help with it
Also when I paste the schem in I get a lot of random repeaters just floading around.
This good
Jo so fast of a upload
So I'm guessing the next step is probably an instruction counter?
Hi i love your videos I don't know what to say so i just love your videos
Greetings!
nice
ITS SPONSORED BY BRILLIANT 😩😩😩
did you go to university of michigan by chance
6:23 shouldn't it go up to 1023?
yippi new video :3
Pls, can you give me a trick to build decoders faster without modes.
I just spend like, an hour to build a huge 8bit decoder to finally realize that I can’t use it, it’s to tight.
I can’t just use a structure block, because every possibility’s has their own code.
Pls give me a trick
omg 256 likes beautiful number
How about change `LDI r1 4` to `LDI 4 r1`. In this way, the destination address matches those in add, sub instructions. You can avoid the extra mux.
The instructions set seems to be a little bit rushed, lack some experience/oversight. For simplicity I would rename regA in opcodes as the destination register, but it would make a lot of changes in the math open codes. So it may be too late for such change, in that CPU implementation.
I would have used a pseudo opcode for NOP but that is addressed in the authors top comments.
Instead I would have used the 0 opcode to implement a interups. It is a nice trick since usually memory is usually zeroed, and hitting non initialized data triggers and interrupt, such is "better" than silently continuing.
That said it is fine. Learning is also making errors and reflecting on the mistakes from us and others, and making tradeoffs.
That series taught me the reason for the r0 being hardwired to 0 that puzzled me for years in some CPU designs, and I'm grateful for that.
I got here quick!
Thanks for letting us know, FluffyCatsindeed.
W VIDEO
12:50 is it just me or did it turn black and white here
Its the same for me
LES GO
I made a computer(of sorts) that only has a 12 bit instruction
Me wants functional madness. Me no like harvard. Me like ace. Give us ram code execution pleese
👍
Wow
more than 25 comments in 4 minutes, nice
31 in comments in 18min thats crazy
NEW VIDEO LETS GO
First comment nice
hi guys
Clicked so fast
peak
hi
Hello
I am not very early
But can it run DOOM?
Not at the moment, we need a program counter, jump instructions, enough instruction memory, a graphical display, keyboard or mouse input (which requires some sort of interrupts or simple polling), a C compiler that uses our custom instructions, then just MAYBE we will be able to run doom (or at least a custom version built from the ground up), ALSO we probably need some RAM too.
Yeah I still can’t make a piston door
That’s a completely different field of redstone, I’ve done lots of digital logic with redstone and I am unable to make piston doors bigger than a 2 x 2.
Well, there’s still time to learn I guess?
I build the computer using the tutorial in Excel😂
yo I'm early!
yo
im the 200th like
the video compression is insane, record in higher quality
4081veiw
Weeeeeeeee
1st thats not matt
close 2 first
I like this series