Clocking block with examples in SystemVerilog

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  • Опубліковано 26 гру 2024

КОМЕНТАРІ • 8

  • @NaveenC-t5c
    @NaveenC-t5c Місяць тому +2

    Contents that you're teaching are literally too good. Keep doing many videos, could you please share the notes if possible.

    • @susheelapatagar
      @susheelapatagar  Місяць тому

      Thank you.
      I dont have notes but I can share the ppt if you want.
      susheelarpatgar@gmail.com

  • @kljadhav7072
    @kljadhav7072 Місяць тому +1

    Ma'am your way of teaching is awesome please don't stop making videos there very less teachers making vlsi content. Its our job to support you please don't give up

  • @harjeetsingh-ey4fh
    @harjeetsingh-ey4fh Місяць тому +1

    U r the best mam keep going

  • @Zumbagaming2
    @Zumbagaming2 28 днів тому +1

    Please upload more videos about SV regions and constraint questions it's a humble request

    • @susheelapatagar
      @susheelapatagar  28 днів тому

      @@Zumbagaming2 Yeah. I have already covered sv regions and constraint questions will be available in shorts video. Please checkout "interview questions" playlist.