Hi Sir, It was a very nice example. Have a quick question. 1. What if both the ends are terminated with 50ohm and how do you calculated the capacitance across the trace from port 1 to port 2. 2. Is there a way to measure parasitic capacitance of a PCB trace in CST simulation ?
1) When you terminate with 50 ohm there is a current flowing and the capacitance you extract is negative. 2) I think exactly this is explained in the video
thanks for this explanations , i have quires about these RLC value that calculated , how can i arrange the components with these values in an equivalent circuit , because each topology as CSRR or SRR as an example has specific construction from one coil or more it depends .. and capacitors also .. should I use the Inductance value that you calculated as sum of all inductance used in circuit ? same question on capacitor value and resistance ...could you please show me this concept in video ?
This methodology does not automatically work for the generation of equivalent circuits constructed with some topology. I see many questions about meta materials. This is not what I had in mind when generating this video. What I do get is the low frequency R L C value of a component like inductor or capacitor. I am not familiar with the methodology to generate RLC circuits for meta materials, as this is not an emc topic.
@@AndreasBarchanski thanks for your response, could you please lead me to whom is familiar with the methodology to generate RLC circuits for meta materials please
It will work the same way. If you are interested in RL you need to create a loop in the schematic for which you will extract the RLC values . The key is your schematic. The loop you define by shorting the ports needs to make sense.
I think you will find many good tutorials about circuit simulation on UA-cam. Even I use CST circuit simulation, because it offers nice features like Z-Parameter calculation, you could start with LT Spice which is free and has many tutorials available.
Thank you sir, it was too simple but very helpful, we are waiting for the next videos and new ideas:)
Super useful and superb explaining
Perfect explained as always🤩. New idea for next video 😜
how to get RLC value from spice model for FSS unit cell with varactor in CST?
Hi Sir, It was a very nice example. Have a quick question.
1. What if both the ends are terminated with 50ohm and how do you calculated the capacitance across the trace from port 1 to port 2.
2. Is there a way to measure parasitic capacitance of a PCB trace in CST simulation ?
1) When you terminate with 50 ohm there is a current flowing and the capacitance you extract is negative.
2) I think exactly this is explained in the video
thanks for this explanations , i have quires about these RLC value that calculated , how can i arrange the components with these values in an equivalent circuit , because each topology as CSRR or SRR as an example has specific construction from one coil or more it depends .. and capacitors also ..
should I use the Inductance value that you calculated as sum of all inductance used in circuit ? same question on capacitor value and resistance ...could you please show me this concept in video ?
This methodology does not automatically work for the generation of equivalent circuits constructed with some topology. I see many questions about meta materials. This is not what I had in mind when generating this video. What I do get is the low frequency R L C value of a component like inductor or capacitor. I am not familiar with the methodology to generate RLC circuits for meta materials, as this is not an emc topic.
@@AndreasBarchanski thanks for your response, could you please lead me to whom is familiar with the methodology to generate RLC circuits for meta materials please
Very useful video. And how about multi port networks?. How can we extend this method for model woth more than two ports?
It will work the same way. If you are interested in RL you need to create a loop in the schematic for which you will extract the RLC values . The key is your schematic. The loop you define by shorting the ports needs to make sense.
Hello , andreas , can you make vedio , how to do biasing current simulation for inductor in cst.
could you please teach me how can i describe a series rlc circuit or parallel rlc circuit ?
or how can i describe a equivalent circuit of pin diode
These are very basic things. Just google them.
Hello. Could you please guide us how can we design an equivalent circuit of a unit cell (metasurface) for a S-parameters. Thanks in advance
did you get your answer on any video, if yes please refer to me. it would be very helpful
I am sorry, but that less my area. I deal mostly with EMC models. However, the way you go from S-Parameters to RLC is the same in both.
Can you make a video explaining what schematic is and how to use it ?
I think you will find many good tutorials about circuit simulation on UA-cam. Even I use CST circuit simulation, because it offers nice features like Z-Parameter calculation, you could start with LT Spice which is free and has many tutorials available.
@@AndreasBarchanski thanks alot
how to add diode PIN in cst studio
Check my video "Getting Started with coupled EM Field an Circuit Simulation"