#1 DE1-SoC Introduction

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  • Опубліковано 31 жов 2024

КОМЕНТАРІ • 30

  •  6 років тому +3

    Fantastic, it's the best class that I already saw on UA-cam, better than all my engineering classes. Bruce you're awesome, I hope in the near future to do a master's in Cornell and have classes with you, once more, you're great teacher!

  • @yaswanthraparti8641
    @yaswanthraparti8641 5 років тому +9

    great material. But watch it in 1.5x to save your precious time and get more info.

    • @RPShredow
      @RPShredow 5 років тому

      Man that is fucking genius.

  • @xiangboqiang321
    @xiangboqiang321 6 років тому +1

    thank you very much! as an undergraduate from china, it's so hard to find others' tutorials except terasic.

  • @hojjatabdoli3972
    @hojjatabdoli3972 6 років тому +3

    I have learned some good things from you, you are amazing, thank you teacher!!

    • @ece4760
      @ece4760  6 років тому +2

      Good to hear1

  • @maplefoongdoi
    @maplefoongdoi 4 роки тому +1

    Thanks a lot for the video. I am actually new to DE1-SoC and this video gave me some idea about board. I am working on how to send floating point data (a lot of data) from HPS to FPGA, perform some calculation for example getting RMS and send the result back to HPS. Using Qsys. Would like to get some enlightenments from you on the floating point part...

    • @ece4760
      @ece4760  4 роки тому +2

      Intel provides floating point IP for the FPGA, but it takes a LOT of FPGA resource. I doubt that calculating RMS in this way will be faster than just doing it on the HPS

    • @maplefoongdoi
      @maplefoongdoi 4 роки тому

      @@ece4760 I see. Will it be better if do binary scaling in HPS and send to fpga, when back to Hps and scale back again.

    • @ece4760
      @ece4760  4 роки тому +2

      What is your goal? If you want speed, then keep the whole calculation on the HPS. Otherwise the communication rate will disappoint you.

    • @maplefoongdoi
      @maplefoongdoi 4 роки тому +1

      @@ece4760 yea speed is my top priority, I thought I can use fpga as accelerator in perform some calculations.
      Anyway, thank you so much sir for sharing the knowledge.

    • @ece4760
      @ece4760  4 роки тому +2

      @@maplefoongdoi You can use the FPGA for that, but only if the calculations are harder than the communication

  •  7 років тому

    Very good!

  • @xiangyuzhang43
    @xiangyuzhang43 6 років тому +1

    best ever! Thanks so much!

  • @danielaston6560
    @danielaston6560 7 років тому +1

    Cheers Bruce!

  • @petervansan1054
    @petervansan1054 6 років тому +2

    Hello, I am not your student however I just bought de1-soc for hobby reasons and I wonder, if I only want to use FPGA, can't I just directly deploy to the usb blaster 2 and bypass need to do any c management on arm chip? Or is everything explained here necessary?

    • @ece4760
      @ece4760  6 років тому +2

      You can use just the fpga

  • @shubham709
    @shubham709 5 років тому +1

    Hi Bruce, thanks a lot for these videos. Can I follow this course with a DE10 nano board?

    • @ece4760
      @ece4760  5 років тому +2

      Much of the material should work, but I dont think the DE10 has the same peripherials, like video and audio.

    • @shubham709
      @shubham709 5 років тому +1

      ok sure thanks a lot 😀

  • @idan4329
    @idan4329 7 років тому +1

    ?34:40 Does the single core only support refers to the ARM a7 or the FPGA
    cores? Are there any cheaper alternative sdk's / sw suites for FPGA/SoC programming (besides moving to Xilinx/Microsemi/Lattice products) ? Is it even profitable to build commercial
    products (running tasks in real parallel -"multicore") with FPGA /SoC when you work in a small company / as a (remotely working) freelancer (aka while
    not working in giant companies like INTEL or government/academic institutions) . I think even Adapteva's chip is usually combined with an FPGA on a board (or
    so called SoC + DSP) to compete with GPU's performance. I guess freelancing in the embedded systems SW field (MCU,MPU) is much more easy thanks to better maturity of open source development software

    • @ece4760
      @ece4760  7 років тому +1

      The 'core' refers to how many processors are in your PC to do the compile. The Intel/Altera design software is free for the single PC core license. On the FPGA you can build whatever you like

  • @AH-wk1id
    @AH-wk1id 7 років тому

    I wonder if there's a cheaper board available that could be used as a substitute for the de1-soc for this course. Like around $100-$150. Thanks for making this course available.

    • @IExSet
      @IExSet 6 років тому +1

      Yep, DE0-NANO-SoC, or even cheaper De0-NANO without SoC

  • @idan4329
    @idan4329 7 років тому +1

    The SoC / FPGA used the broadband internet connection to "spam" the mailing server - Does that mean it contains malware/spyware?

    • @ece4760
      @ece4760  7 років тому +2

      The SoC was infected from the internet after I brought up LInux. My security is better now.

  • @companymen42
    @companymen42 5 років тому +1

    Do you have a lecture on UART?

    • @ece4760
      @ece4760  5 років тому +1

      For microcontrollers, yes.If you mean on de1-soc, no,.

  • @cam545
    @cam545 6 років тому +1

    Lol.."just whip me" talking about emacs