MOS basics

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  • Опубліковано 24 січ 2025

КОМЕНТАРІ • 22

  • @socialogic9777
    @socialogic9777 Рік тому

    I watched this over 4 days and it was so much worth it. The intuitive techniques are a necessity when getting lost in long derivations and unable to interpret the results is a reality.

  • @TheNarfypoit
    @TheNarfypoit 2 роки тому +1

    Dear Sir, thank you for sharing knowledge, and for the excellent method of delivery.
    Minor notice: From 2:58:16 onwards as you showcase the differential amplifier schematics; it is important to note that your output nodes' polarities should be reversed. Your diff pair devices are still common source amplifiers, so it stands to reason that the polarity of output node at D of device will be of opposite phase to input at G of device.

  • @sunkarasaigoutham
    @sunkarasaigoutham 5 років тому +2

    so clearly explained about the effect of Electric fields on electron flow

  • @nikhilsen9007
    @nikhilsen9007 7 років тому +1

    Knew almost all of the things taught in lecture but still it was very helpful to gain some new prospective on same concepts and learnt a lot from industry experience.
    Please share those notes used in lecture.
    thanks a lot.

  • @SuryaPraK45H
    @SuryaPraK45H 4 роки тому +1

    Thanks a lot for this! Really helped me to revise my concepts!

  • @mengnayang4954
    @mengnayang4954 8 років тому +3

    great video! explain things so clearly!

  • @abhi2138
    @abhi2138 7 років тому +1

    Great Efforts made......

  • @TheNarfypoit
    @TheNarfypoit 2 роки тому

    Also, are you sure the expression you arrive at in 3:39:14 for the zero frequency is correct?
    Most analyses I've seen of the frequency response of the 5T OTA place the zero at ~ -2gm5/C2; i.e., twice the mirror pole frequency, *and at the LHP*, not RHP.

  • @shaikmahammadsharif8506
    @shaikmahammadsharif8506 3 роки тому

    great explanation . thank you sir.

  • @yousefbilbeisi1530
    @yousefbilbeisi1530 9 років тому

    thank you sir ,, i learned allot from you , i do really appreciate your sharing to the knowledge you have

  • @sermalingam8043
    @sermalingam8043 7 років тому

    Great work Sir.

  • @socialogic9777
    @socialogic9777 Рік тому

    AC ground gets created due to splitting of vin at 3:03:36, i didn't understand?

    • @utubevenky
      @utubevenky Рік тому +1

      yes the common node doesnt see any "ac signal" or small signal, in other words even in AC or tran analysis it will remain in the same voltage(= the DC voltage) that you see in the operating point analysis

  • @bhuvi441
    @bhuvi441 9 років тому +1

    Thank you so much sir !! Really grateful sir !

  • @nikhilsen9007
    @nikhilsen9007 7 років тому +1

    In the 3rd topology of current mirror the gate voltage for upper MOS should be 2Vt+Von rather than 2Von+Vt.

    • @amaramohith6445
      @amaramohith6445 7 років тому

      it is equal to 2von+vt only as the lower mos require 1 von=(vgs-vt) to be in saturation and the von+vt=vgs drop across vgs of upper mos total summing up to 2von+vt

  • @NIPUN000
    @NIPUN000 9 років тому

    Thank you very much! I liked the notes is there any way i can get a copy of notes :O :D

  • @mrpossible5696
    @mrpossible5696 5 років тому +1

    Ty

  • @shaikmahammadsharif8506
    @shaikmahammadsharif8506 3 роки тому

    can you please provide the pdf link for the reference . ? i mean hand written pdf .