Loved the way you are explaining... Thanks a lot.. very clean and clear cut information.. so much efforts.. really felt happy after seeing this video because I understood very clearly..
Very well explained.I had used metal jogging and diode insertion techniques to fix antenna violation drcs but didnt know the reason for doing so.This video helped me understand it,thanks for the upload.
What happens to the charge present in M3 even though we have broken the path but still charge will remain on that metal , how will that path get a discharge path ? Another question is that while adding the diode how do we make sure the GND is connected as this process occur during manufacturing & at that time there is no electrical path present ?
Hi Madam, is there a 3rd way of preventing antenna violation when there is no metal jump and diode available, but we have a dummy mosfet to increase the gate area?
you said that in case of forward bias diode, the current will flow through the diode and not through the gate, but Gate current is already zero, so what's the issue??
Superb explanation. I just have one doubt though - for another example, where there is a path from M3 to gate oxide and also to the output. Like there is no need for M4 metal for that path. In that case, why would the charge get discharged through gate oxide alone and not the output? Why not damage the output?
Hi Mam, A heartful thanks to you. It is really helpful and by seeing this video and with your explanation, it has boosted my confidence on this topic. If possible, Request you for more videos on DRC, ERC, LVS and on power-planning like estimating no. of strips, the spacing between them etc. All the Best for your upcoming videos Thank you
Great explanation but as you have shown that the exposed part during etching will be etched out. So while doing plasma etching the charges will be bombarded on the metal and that part will get etched out so how does it will cause the problem when it is already etched out.
Woow, thank you so much for such a wonderful explanation. Can you please explain how come the charges are getting accumulated only in dry etching process? Also I have another doubt, how the dry plasma etching deposit only one kind of charge as the plasma gas is neutral in nature i.e. both the electrons and positive ions are equal in number.
Hello Mam, can you make a video on clock Gating, setup time and hold time between latches and latch to flip flop, path based and graph based analysis. Thank you
Hi Mam, according to this video, in diode insertion method , in both the forward and reverse biased diodes, the current is not reaching the gate, can we get a clear explaination regarding this.
Nowadays mostly designs operate at .75 v to 1 v..and Zener diode is having breakdown voltage of 6 v.. Then based on what criteria charge flux is discharged through diode. How do we know what is the cutt off voltage for charge accumulation to destroy gate oxide??
That means that whenever there is high charge in metal it will be break down reverse bias diode and that total charge will be discharged that's u r saying,then that diode will also discharge the our desired Voltage across gate?
When the potential on metal during etching reaches breakdown potential of diode, charge will discharge through reverse biased diode. It will not affect desired voltage because the diode is reversed biased. Normal operation of circuits happens at very low voltage, at that voltage reverse biase diode will not turn on. So normal operation of circuit will not be affected.
@@backtobasics5602 I love your explanation.It is so simple and very easy to understand.just one time listening is enough to grasp the topic.I got to know many basic concepts and clear my doubts from your videos..Much much better than the institute where I did training in PD.
Maan if there is charge accumulated in the metal 3 layer and if we use jumper of higher metal layer, since metal 4 is not yet formed but metal 3 is divided and it wont reach gate oxide, but then also metal 3 will have charge and it will be accumulated in metal 3 layer.And it metal 4 layer jumper is formed it will discharge through it,then how jumper will save gateoxide? Please help
why we use upper metal m4, why cant m2 ?? there is no discharge path for already manufactured m3 metal( still the charges are present in m3). once m4 manufactured there is a connection right similar to m2 connection
Partial blockage are used to restrict the % of utilisation.for eg we use partial placemnt blockage with % 50%,then only 50% of that area is occupied by std cells.remaining will be placed outside the blockage. The main aim of partial blockage is to reduce congestion effects
Hello mam.. Very nice explanation But I have a one doubt One side of that long metal is connected to gate and another is connected to some drain sharing then what will happend Is Antenna affect is coming??
@@kandrashilpasree114 I am re-commenting : yes , we have antenna violation , on local net which includes driver (drain)and receiver (gate), in this case we add diode near to receiver (to protect gate)
Loved the way you are explaining... Thanks a lot.. very clean and clear cut information.. so much efforts.. really felt happy after seeing this video because I understood very clearly..
Perfect and clean explanation...even a laymen can understand without any knowledge
Thanks 😊
One of the best explanations of antenna effect that I have ever seen. Thank you so much mam!!
Very well explained.I had used metal jogging and diode insertion techniques to fix antenna violation drcs but didnt know the reason for doing so.This video helped me understand it,thanks for the upload.
All my doubts are cleared by this... Thank you
it's really helpful and you have explained in depth
thank you so much
please upload more videos on physical design
Crystal clear explanation. Perfectly understandable.
What happens to the charge present in M3 even though we have broken the path but still charge will remain on that metal , how will that path get a discharge path ?
Another question is that while adding the diode how do we make sure the GND is connected as this process occur during manufacturing & at that time there is no electrical path present ?
Best explanation I have seen .. thank you! Great job !!!
Thanks a lot for the explanation! You're an angel!
Thank u for explaining in detail .... useful for my interview
Such a clear explanation. Very useful..big thumbs up
It is very useful, please update the double pattering and triple patterning
Thank you so much madam....very good and clarity explanation 👍🏻
Really useful video, Thank you!
Nice explanation. Thank you very much.
Great explanation!
Thanks. it's really clear
Thnak you mam very well clearly explained
Hi Madam, is there a 3rd way of preventing antenna violation when there is no metal jump and diode available, but we have a dummy mosfet to increase the gate area?
Very clean explanation, thank you
best explantions i ever seen
Good Information. Thanks for sharing your knowledge.
now i clearly understood thank mam
Great Explaination mam
Very clear, thanks!
Awesome Madam. Very Useful information
Can you please explain how we can control the selectivity of plasma etching
you said that in case of forward bias diode, the current will flow through the diode and not through the gate, but Gate current is already zero, so what's the issue??
Hi, Are you not doing any technical videos ?..
Superb explanation. I just have one doubt though - for another example, where there is a path from M3 to gate oxide and also to the output. Like there is no need for M4 metal for that path. In that case, why would the charge get discharged through gate oxide alone and not the output? Why not damage the output?
Thank you so much
Amazing!!!
Amazing 😍😍
Hi Mam,
A heartful thanks to you. It is really helpful and by seeing this video and with your explanation, it has boosted my confidence on this topic.
If possible, Request you for more videos on DRC, ERC, LVS and on power-planning like estimating no. of strips, the spacing between them etc.
All the Best for your upcoming videos
Thank you
I am glad that you liked it :)
I will make the videos on suggested topics in future.
Thanks.
What is Isotropic and anisotropic ?
nice video,very useful
Great explanation but as you have shown that the exposed part during etching will be etched out.
So while doing plasma etching the charges will be bombarded on the metal and that part will get etched out so how does it will cause the problem when it is already etched out.
Can you tell what is difference between metal 1 metal 2 and so on?
Good information mam
Great video but you should also include CMP as a charge inducing mechanism.
Very good explanation one request can u make an video on physical verification checks like perc softcheck , lvs, dfyd, vrc, pattern matching , erc
Woow, thank you so much for such a wonderful explanation. Can you please explain how come the charges are getting accumulated only in dry etching process? Also I have another doubt, how the dry plasma etching deposit only one kind of charge as the plasma gas is neutral in nature i.e. both the electrons and positive ions are equal in number.
Etching is done before metal4 fabrication? in this video?mam plz explain
Etching is done during fabrication at almost every step again and again
Hello Mam, can you make a video on clock Gating, setup time and hold time between latches and latch to flip flop, path based and graph based analysis.
Thank you
Thanks
Indeed very useful info.
Can you recommend a book for this topic?
Hi Mam, according to this video, in diode insertion method , in both the forward and reverse biased diodes, the current is not reaching the gate, can we get a clear explaination regarding this.
Nowadays mostly designs operate at .75 v to 1 v..and Zener diode is having breakdown voltage of 6 v.. Then based on what criteria charge flux is discharged through diode. How do we know what is the cutt off voltage for charge accumulation to destroy gate oxide??
very usefull
Why antenna does not occur near drain or source
That means that whenever there is high charge in metal it will be break down reverse bias diode and that total charge will be discharged that's u r saying,then that diode will also discharge the our desired Voltage across gate?
When the potential on metal during etching reaches breakdown potential of diode, charge will discharge through reverse biased diode. It will not affect desired voltage because the diode is reversed biased. Normal operation of circuits happens at very low voltage, at that voltage reverse biase diode will not turn on. So normal operation of circuit will not be affected.
Good explanation..
it is very useful and please upload more videos on physical verification
Sure.
@@backtobasics5602 if you have any pdf file on physical verification just forward to this mail shivakumarnakka49@gmail.com... Please!!!!!
Good information.
Can you please upload video on ECOs and ESD ?
Will try my best to upload more videos.
@@backtobasics5602 I love your explanation.It is so simple and very easy to understand.just one time listening is enough to grasp the topic.I got to know many basic concepts and clear my doubts from your videos..Much much better than the institute where I did training in PD.
I am really glad that you like my videos :)
Most of people in industry saying that jumpers/jogging can also use lower metals as well. Is it helps?? If yes, how it works??
According to my knowledge.. Jumper in lower metal layer wont help antenna.
Maan if there is charge accumulated in the metal 3 layer and if we use jumper of higher metal layer, since metal 4 is not yet formed but metal 3 is divided and it wont reach gate oxide, but then also metal 3 will have charge and it will be accumulated in metal 3 layer.And it metal 4 layer jumper is formed it will discharge through it,then how jumper will save gateoxide?
Please help
Once metal 3 is etched.. The charge will not be there on metal 3 anymore. Charge is there only till metal is in plasma.
Seems there are methods to discharge the accumulated charge of m3 before M4 is being fabricated...
good ma
why we use upper metal m4, why cant m2 ?? there is no discharge path for already manufactured m3 metal( still the charges are present in m3). once m4 manufactured there is a connection right similar to m2 connection
and there are two other ways , one we can use dummy load insertion other change routing order to top metal since top metal as less antenna issues
Hey do more videos ..
Pls upload more vedios on physical design
I will try my best to upload videos more frequently.
Good
Thanks :)
When we use partial blockages? Pls reply me
Partial blockage are used to restrict the % of utilisation.for eg we use partial placemnt blockage with % 50%,then only 50% of that area is occupied by std cells.remaining will be placed outside the blockage.
The main aim of partial blockage is to reduce congestion effects
You are pd engineer
@@aparnavalluri8667 yes
I have lot of doubts in pd will u pls solve
@@aparnavalluri8667 yaa sure.whatevr I knw I can help you with dat 🙂
Hello mam..
Very nice explanation
But I have a one doubt
One side of that long metal is connected to gate and another is connected to some drain sharing then what will happend
Is Antenna affect is coming??
@@kandrashilpasree114
I am re-commenting : yes , we have antenna violation , on local net which includes driver (drain)and receiver (gate), in this case we add diode near to receiver (to protect gate)
@@mohangowda4282 okay