Hi Zach, do you have any comments about jitter on a clock (digital or analog) and how to quantity errors in it when it rises/falls compared to an ideal clock?
Hi Zach, in the 'Example Digital Signal & Impedance Curve' why you have BW=1/Trise (4ps) = 250Ghz?. (Should be 250000Ghz?). In the case of 250 Ghz you have a loss of 50 dB, this means that the channel needs to be redesigned right? How many dB should we consider in the case of 0.35 / Trise to 1 / Trise? Thank you
Hi Zach, Thanks a lot for the wonderful contents. Could you please talk a bout PCB stack ups, and best approach to determine layer orders in 4,6 and 8-layer PCBs? There are a lot of information on the net, but they are mostly misleading and against each other. Thanks,
I'd be happy to! Just something to note about things that you read on the internet: sometimes the design guidelines you'll read will appear to be contradictory, but they are referring to different design situations, and the author may not have made it so clear. Sometimes, both sets of contradictory guidelines will give you a functional PCB, but maybe one of them creates an SI/PI/EMI problem, it's difficult to come up with one guideline that covers every situation. Also, sometimes you should pay attention to the dates on articles or application notes if you look at design guidelines. In some cases, the design guidelines you read will be 20-30 years old, so they were most likely fine when they were written but they might not be the best choice today. Hope this helps!
Hi Jayakrishnan, we filmed something about this and it was published a couple weeks ago, you can watch it here if you haven't seen it yet: ua-cam.com/video/QxdwziRjpTw/v-deo.html
Hi zach, here takes a question. The reason you choose the nyquist rate as a bandwidth here is based on the sampling theorem, don't you? But, if we use exact the clk rate as same as the data rate to retrieve the data in the receiver side, is there something to do with Nyquist rate? Appreciate in advance Ray
Hello, I should probably make a better distinction on something, the Nyquist sampling rate and the Nyquist frequency are not the same thing. I sometimes say the receiver "samples" the incoming bitstream because sometimes it's helpful to think of a digital receiver as operating similar to a 1-bit ADC, but that's not exactly true for how the device operates. So in the case of 2-level signal formats (like NRZ), the Nyquist frequency is half the data rate, which just happens to also be the clock frequency. For multi-level signal formats (like PAM-4), the Nyquist frequency is the data rate divided by the number of digital logic states per UI. So for 112G PAM-4 signaling, the Nyquist is 112/4 = 28 GHz.
Actually people limits himself to learn about different field, but you dont need to have a PhD in physics to learn something relevant to electronics becuse all of the phenomenons like heat electricity electromagnetics acts together in real world. So to think about something more complex, dont wait to have a PhD (probably wasting time) Just read the papers and books and keep watching Zach :)
Thanks a lot ❤
Hi Zach, good job.
I would love to see a video about use of eye diagram and use of S parameters for hispeeed design.
I know it's been awhile since you asked this, but I'm going to get started filming this today!
Thanks a lot! Very helpful! Please continue these tutorials!
You are hardware god!
Really instructive video.
Keep up the good work!
Hi Zach, do you have any comments about jitter on a clock (digital or analog) and how to quantity errors in it when it rises/falls compared to an ideal clock?
Hi Zach, in the 'Example Digital Signal & Impedance Curve' why you have BW=1/Trise (4ps) = 250Ghz?. (Should be 250000Ghz?).
In the case of 250 Ghz you have a loss of 50 dB, this means that the channel needs to be redesigned right? How many dB should we consider in the case of 0.35 / Trise to 1 / Trise?
Thank you
Hi Zach,
Thanks a lot for the wonderful contents. Could you please talk a bout PCB stack ups, and best approach to determine layer orders in 4,6 and 8-layer PCBs? There are a lot of information on the net, but they are mostly misleading and against each other.
Thanks,
I'd be happy to! Just something to note about things that you read on the internet: sometimes the design guidelines you'll read will appear to be contradictory, but they are referring to different design situations, and the author may not have made it so clear. Sometimes, both sets of contradictory guidelines will give you a functional PCB, but maybe one of them creates an SI/PI/EMI problem, it's difficult to come up with one guideline that covers every situation.
Also, sometimes you should pay attention to the dates on articles or application notes if you look at design guidelines. In some cases, the design guidelines you read will be 20-30 years old, so they were most likely fine when they were written but they might not be the best choice today. Hope this helps!
Could you do a lecture of power distribution network design for high speed micro processors or fpgas requiring very high current slew rates?
Sure, I can give an overview of this, I'll add it to our list.
Hi Jayakrishnan, we filmed something about this and it was published a couple weeks ago, you can watch it here if you haven't seen it yet: ua-cam.com/video/QxdwziRjpTw/v-deo.html
Thank you very much. Appreciate it a lot.
Hi zach,
here takes a question. The reason you choose the nyquist rate as a bandwidth here is based on the sampling theorem, don't you?
But, if we use exact the clk rate as same as the data rate to retrieve the data in the receiver side, is there something to do with Nyquist rate?
Appreciate in advance
Ray
Hello, I should probably make a better distinction on something, the Nyquist sampling rate and the Nyquist frequency are not the same thing. I sometimes say the receiver "samples" the incoming bitstream because sometimes it's helpful to think of a digital receiver as operating similar to a 1-bit ADC, but that's not exactly true for how the device operates. So in the case of 2-level signal formats (like NRZ), the Nyquist frequency is half the data rate, which just happens to also be the clock frequency. For multi-level signal formats (like PAM-4), the Nyquist frequency is the data rate divided by the number of digital logic states per UI. So for 112G PAM-4 signaling, the Nyquist is 112/4 = 28 GHz.
@@Zachariah-Peterson ok! got it! thank you Zach
Please explain nand flash ic,nor flash ic, DDR - 1,2,3,4,5 , PCIe
Hi Pravin, we'll be doing videos on signaling standards coming up, I will try and hit some of these soon, thanks!
Biceps 💯
necessary to compensate for impedance
Dang, I need a PhD in physics.
Actually people limits himself to learn about different field, but you dont need to have a PhD in physics to learn something relevant to electronics becuse all of the phenomenons like heat electricity electromagnetics acts together in real world. So to think about something more complex, dont wait to have a PhD (probably wasting time)
Just read the papers and books and keep watching Zach :)